• Problem getting -10v/+10v output from AD5761R DAC


    I using AD5761R DAC in my project. Also in my project, Texas instruments company has TMS320F28379D DSP. I want to output -10v/+10v using AD5761R DAC over DSP with SPI protocol.

    I downloaded the AD5761R device driver files from wiki.analog.com.…

  • EVAL-AD5761R: SPI Communication/Board Power


    We have a build that is going to be using the AD5761R DAC and the EVAL-ADICUP3029 board, our company decided to try and evaluate it using the EVAL-AD5761R board. We will be communicating with it over the SPI PMOD connector of the 3029 board connected…

  • AD5761R output is not right.

    I am using an AD5761R DAC connected to an FPGA. All signalling and signal timing to the DAC looks good and I am doing a simple test:

    Signal Conditions for this test: RST, CLR and LDAC are held high in the FPGA.
    SYNC, CLK and Data come from the FPGA.


  • AD5761R shorting the DGND and AGND


    I want to maintain single ground on the board for the chip AD5761R.

    So is it OK to have common ground connection, i.e. short the DGND and AGND together?

    Kindly let us know.

    Thanks & Regards,

    Nanjunda M

  • ad5761R

    I just got the AD5761R, to do a better accuracy of the DAC output module, the simpler the better. Voltage range between 0-3.3V can be, and can control the output of RAMP and SIN waveforms, is there any reference design and development routines?

  • AD5761R




  • AD5761R


  • AD5761R


  • AD5761R OUTPUT

    I am using the AD5761R chip, why does the software fully reset when there will be a signal output on the SDO? Then VOUT, there is no voltage output. The following image is a schematic of the chip design, where VCC1 is 3.3v.

    Here's my time series chart…