Hi, 

Apologies for the late response.

You may want to take a look at the EVAL-AD5760SDZ. The AD5760 will satisfy the 0-10V output requirement. It comes with the AD8675 opamp but is limited to produce current of upto 35mA. You can replace the AD8675

Hi Tony,

The NSD of 11.8nV/rtHz is only at specific frequency of 1kHz, meaning the bandwidth is only 1Hz. So you should not multiply this value to the 0.1 to 10Hz bandwidth.

The 1/f noise is the 0.134uVp-p specification over the 0.1Hz to 10Hz bandwidth…

Hi DanTech,

The AD5543 requires an op amp on the output for the I-to-V conversion, the voltage-switching mode is not an option here.

Might be interesting to consider the AD5760, 16-bit ultra stable voltage output DAC. If settling time is key in your…

Hi Molly,

Regardless of the speed of your clock, your latch should follow T_CTLE, T_LEHI, T_LETC, and T_LELO in the timing diagram. Given that you have a 40kHz clock, a pulse must be issued after the 16th falling clock edge (approximately after 400us…

Hi,

1. Yes, we set the reference to 4.096 by configuring CFG[5:3] as 001.

2. The REF pin, not the REFIN pin has been use to provide voltage reference to a DAC.

3. The ADC does not need a buffer. The buffer is for providing voltage reference of a DAC…

Hi Richie,

In order to reduce the amount of ringing on the SPI bus, the addition of series resistors (a few hundred ohms) to the lines should help.

Keeping so unstable logic signals would be a problem, as you would need to maintain the logic levels…

Hi Richie,

So your requirement is a single channel bi-polar with +/-10V span and an LSB of 0.1mV. 

20V / 0.1mV = 20k codes at a min.  64k codes is a 16 bit DAC. 

The AD5570 will meet your needs.  The newer AD5760 will also meet your requirements.