Request for information on CONFIGURING THE AD5724/AD5734/AD5754
Data Sheet AD5724/AD5734/AD5754 rev.FCONFIGURING THE AD5724/AD5734/AD5754: 'The DVCC must be brought high before any of the interface lines are powered. If this is not done, the first write…
My initial write on the AD5754 is ignored ?
BTW, the sweeping signal is just controlled by the tuning voltage which is generated by AD5754.
I'm using AD5754 DAC with STM32 MCU (3.3v).
Output of DAC loaded to 5 kOhm / 200 Ohm resistor divider, Vdd is 5v, AVdd and Avss is +12 and -12 volts, reference is 2.5v. LDAC, CLR and BIN2COM are tied to 5v.
I can program DAC (0x0c0004, 0x10000e…
hi,am interfacing with AD5754.i am not getting about clear and load command .what is the value for clear and load in control register.
I have tested this with the evaluation board in our laboratory. To answer your questions:
1. Can I set control register when I let Clear low?
A: You can change the CLRSEL register when CLEAR pin is low but it will have no effect to the DAC. The…
The substrate of the AD5754 needs to remain reverse biased with respect to all the N-wells sitting in the substrate. To do this, the substrate should be maintained at the lowest potential which is AVSS. If this is the case there will be no diodes…