• AD5750-1: Can the software determine which variant of AD5750 is populated -1 or -2?

    Can the software determine which variant of AD5750 is populated -1 or -2?


    What we have characterized is that the reset cycle typically takes 30us, we
    can’t guarantee the behavior of the part receiving SPI signals during this
    reset cycle…
  • AD5750 circuit


    I'm working on a project where I want to use the AD5750 to create the analog outputs transmitted through SPI.

    I've created a schematic but I'm not positive I did everything right. Is the attached schematic going to work? Or is there some obvious…

  • AD5750

    hello, i am new to this forum and my apologies if i make any mistake; i am using AD5750 voltage/current driver and it is not working as defined by the datasheet, don't know what is wrong. it output constant 5V for all unipolar output selections and wrong…

  • AD5750 Calibration

    Hi ,

    Can we calibrate that when we input 0V we get 0mA and in the same way when we input 4.096V to get 5V .

    What is the margin that we can see .

    Basically want to know if we can output 0V,0mA and 10.5V,21mA and

    Thanking you

  • Bandwidth AD5750

    Hi, I'm new in this community and I hope you guys can help me!


    I would like to use the AD5750 for a high frequency application but I didn't find information's about the bandwidth of the IC.

    After first tests with the evaluation board …

  • AD5750-1 HART?

    Hi, There

    Q1. Is AD5750-1 compatible with HART?

    Q2. Can I apply CN0278 ciruit for AD5750-1. I mean that AD5750-1 will be used for replacement of AD5422.

  • AD5750 SW control SPI communication


    I'm trying to communicate AD5750 Industrial Current/Voltage Output Driver with Programmable Ranges using stm32F207 in SPI full duplex master mode.

    I have tried both 8 and 16 bits data size but the return value is always "0xFFFF". Maybe there is…

  • AD5750 hardware mode OUTEN

    What are the OUTEN pin's levels in hardware mode, which indicate when it's
    enabled or disabled.


    In hardware mode, the OUTEN is enabled when the pin is high ('1') and disabled
    when OUTEN is low ('0'). Usually…
  • AD5750 Vsense+ and Vsense-

    Please excuse my ignorance, my analog side is very much rusted, working mostly on digital circuits.

    I am using a AD5750 dual rail driver in industrial circuit. It has its voltage output on Vout and then 2 pins for Vsense+ and Vsense-.

    The datasheets…

  • Questions about chip AD5750-2BCPZ

    I am working for FPGA project using chip AD5750-2BCPZ recently,and face with some trouble:

    (1)According to the data sheet,pins( VSENSE+ and VSENSE- ) are used to protect the device, will they protect the load or just protect the chip AD5750-2BCPZ?