• AD5686 SPI

    Hey all;

    This is my first discussion here at engineer zone:

    We are using the DAC AD5686 daisy chain mode to end with 32 channels for an application.

    I was wondering if between the DOUT of one DAC and the DIN of the other DAC a pulldown resistor is…

  • RE: Continuous playing with IIO subsystem DAC driver

    Hi,

    Unfortunately there is no driver support for continuous output for the AD5686 at the moment.

    - Lars

  • RE: AD5686 output not updated.

    Hi Yuki,

    We haven't received similar queries such as this.

    Have you tried using HW and SW RESET functionality to recover?

    Cheers,

    Ivan

  • RE: AD5686 problems with timing

    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
    …

  • RE: Labview Code for AD5686

    Hi Miguel,

    The codes are working.

    Thanks.

    Rainier

  • RE: AD5686R Voltage Ref Accuracy

    Hi there,

    The AD5686 is the best option here. We do not recommend a external voltage refreence with the AD5686R.

    Regards,

    Padraic

  • How to compare settling times of DACs

    I am unsure how to compare the settling times of the AD5544 and the AD5686, due to the different way in which they were measured.

    The AD5544 goes from 0 to full scale then back to zero and has a settling time of 0.9us to plus/minus 0.1% full scale. The…

  • RE: EVAL-AD5370 Overlay

    jjbravo said:
    I've successfully enabled the driver and compiled a kernel, but I'm very confused on how to make the overlay and enable it to be able to use the driver.

    This makes us assume you are using this with a Raspberry Pi.

    Is this correct…

  • AD5544 Settling Time Question

    I am trying to compare the AD5544 current mode DAC to the AD5686 voltage mode DAC and I was needing some help understanding the settling time for the AD5544. For the AD5544 the output voltage settling time is 0.9us to plus/minus 0.1% of full scale, with…

  • AD5686不能输出转换结果

    AD5686不能输出转换结果，试了好多配置都不行，示波器测得的时序和数据手册时序也一致，我是用FPGA的输出引脚直接给AD5686提供时钟信号SCLK，是不是因为这个原因导致的啊？