No direct library available but you can re-use and implement necessary changes to the No-OS driver for AD5684R.
On daisy-chain operation likes Fig 53 (AD5684R x3).
I would like to know command operation.
At 1st step initialize.
1st 2nd 3rd
800001 800001 800001 x3
2nd step Output1
000000 000000 11FFF0 Output OK
3rd step Output2
000000 000000 118000…
You need to connect your gain pin to Vlogic and not VCC. There is an ESD protection between your gain pin and Vlogic hence the flow of current.
I would like to know daisy chain mode command on AD5684R 12bit.
1000 0000 0000 0000 0000 0001
Will DAC address ignore?
DB0 is not meaning DATA bit (D0) ?
SDO doesn't carry any signal ,before processing this command?
SDP board(EVAL-SDP-CS1Z) is detected by both software and the led on SDP board blinks. But error AD5686R Evaluation Board(EVAL-AD5686RSDZ) was not detected appears after that.
Tired 2 software;
1. AD5684R Evaluation Software( CD came with EVAL-AD5686RSDZ…
Please let me know if there is "power-up-sequence" of AD5684R.
"Absolute max rate"would be say no "power up/down sequence" ,I think.
but the timing characteristic say 1.8<= VLOGIC <= VDD on a margin.
I would like to know which description is correct?
Data sheet RevA Page 10 say "Gain pin connect to VDD".
But UG-459 Rev0 Page 6 Figure 5 described Gain pin pull up to Vref.
The search parameter table shows AD5684 having an update rate of 25MSPS. If I take this to mean the output voltage can change with a speed of 25MHz, I don't see how this is possible. 24bit command structure x 20ns min clock cycle x 7us settling time x…
Accodding to 《AD5684R Quick Start Guide》,I think the pin LDAC tie low permanent is OK.
And I have transmited command 0011 to AD5684,but I still detect any output from channel A.
I hope you can give me an example code of driving AD5684,or tell me…