• AD5672R External Reference Voltage

    Can I drive AD5672R with an external reference of 5V?

    In the datasheet I could not find any specs for external references (a.k.a. VREFin), whereas for internal reference there is data.

  • AD5672R not setting its output to default value while in RESET


    I am not able to use the RESET pin to set the DAC outputs to default values before I program the DAC.

    Here is what I do :

    - RSTSEL is set to VLOGIC, because I want a default output voltage of 2.5V

    - t0 : DAC V_LOGIC is supplied with 3.3V ; RESET…

  • RE: AD5672R/AD5676R reset duration is double specified on Datasheet?

    This question has been closed by the EZ team and is assumed answered.
  • AD5672R: Command 0011 unclear / inconsistent

    Dear Madam or Sir,

    I try to use the 0011 command of the AD5672R. I'm not sure about what it does.

    According to table 16 of the data sheet I would expect, that the input register and dac channel addressed by the address field (DB16 to DB19) get written…

  • AD5672r没有输出

    使用STM32F103的SPI驱动AD5672r,始终没有输出,用示波器测试时钟(sclk)和SDI波形如下图,程序固定向2通道发送0x00f3,命令是0011, 即“写入并更新DAC通道”,24位命令字为,0011 0001 0000 1111 0011 0000,从波形上看没有问题,但


  • The AD5672R output drive capability

    The AD5672R output drive capability is stated as 15mA max, is this source and sink or source only, I would like to be able to sink a small amount, <1mA, and would prefer not have to add additional buffers

  • AD5672R Daisy chain not working


    I'm currently working on daisy chaining 2 AD5672R DACs together, I've sent in the command(1000 and DB0=1) to enable the daisy chain mode but it doesn't seem to be responding to the command. I've attached a snap of the chipscope signals and i believe…



    I would also recommend for you to have a look at AD5672R/AD5676R which is a newer 8-channel DAC.



  • RE: AD5410 daisy chain and DCEN bit


    You have to send DCEN bit to all devices to ensure all parts are enabled for daisy chain mode.

    Can you check this EZ thread:




  • RE: DAC update rate


    Thank you for your answer.

    Your advice is very useful to me.

    I have additional questions.



    It is described at AD5791 datasheet

            T17 : /SYNC rising edge to output response time(/LDAC tied low) (datasheet Rev.D table 4)

            Tsettle(Output Voltage…