• AD5668-EP : Power-on reset to midscale

    Hello ,

    I`m asked about AD5668-EP from our customer.

    Customer needs the function that goes to midscale when it powered on.

    AD5668-3 has this function but I could not find this model(AD5668-EP) of midscale version in the ordering information. (In page…

  • SYNC between two AD5668.

    Hi,

     

    Could any one please guide me how to sync two AD5668 DAC.

     

    I referred to UG-155 eval board users guide and both the AD5668 (U1 and U2) has got same net name \DAC_SYNC. The signal goes to a buffer U4-A and other end of the buffer is connected…

  • AD5668 and SPI

    Hello all,

     

    I am trying to communicate using SPI with the AD5668 board. I have looked through the datasheet/driver code and have gotten a good idea as to how I am going to do this; however, I would like to see more documentation or examples. I am having…

  • AD5328 ibis model?

    I'm looking for the ibis model for the AD5328 and cannot locate it.  Is there one?  I tried using the model for AD5668, but I'm getting very odd results.  If I change out the AD5668 model for a generic CMOS receiver everything seems to behave.

  • Where do I tie the exposed paddle on DACs such as the AD5541A, AD5542A, AD5512A, AD5668, AD5628, AD5669 and AD5629 that are packaged in LFCSP?

    Where do I tie the exposed paddle on DACs such as the AD5541A, AD5542A, AD5512A, AD5668, AD5628, AD5669 and AD5629 that are packaged in LFCSP?

  • Datasheet output noise, figures 45, 46 and 47 labelled incorrectly

    The data sheet for the AD5668 shows output noise in figures 45, 46 and 47. The
    voltage axis is labelled in volts, which has to be wrong as this would give a
    peak noise voltage of 0.3V?

     

    The axis value in figure 45, 46 and 47 in AD5668…
  • RE: Regarding AD5668 Serial DAC output

    Hi Mahesh Hegde,

    Can you send on a scope plot of your digital lines, your chip select, your clock, your data line and your clear liner while you are writing to the AD5668 please? I would like to ensure all timing parameters are met. Also, Can you tell…

  • RE: AD5668-1 (DAC) + AD9832 (DDS) <-> REF IN/OUT

    Hi Miguel,

    Thaks for yours answers.

    You are right, in AD5668 (DAC) not conect Vrefout with Vrefin (it's internaly conected!).

    Please, take a look to attached diagram. It's posible to conect REFERENCES in that way?. (In DAC, I will use external…

  • RE: AD5668 Implementation Difficulties

    Hi Pedraic,

    I have attached a zip file with scopes of every pin (taken directly on the pin). There is a fair amount of overshoot; I'm not entirely sure why since it is all one board, but if that's the problem I can certainly attempt to fix it by putting…