• RE: AD5668 output 0 fix

    Input/DAC register contain 0000 by default.

    Reference registers is off (b0) by default.

    Clear code register is set to b00 by default.

    LDAC register should be 00 by default.

    Power down/up register should be on normal operation by default. I don't have…

  • 关于AD5668

    请问各位专家老师与AD5668结构功能相似且零编码误差漂移小于10uV/度的DAC还有哪些?

  • AD5668 and SPI

    Hello all,

     

    I am trying to communicate using SPI with the AD5668 board. I have looked through the datasheet/driver code and have gotten a good idea as to how I am going to do this; however, I would like to see more documentation or examples. I am having…

  • RE: EVAL-AD5668 USB connection problem

    This does not appear to be ACE software. If there were an issue with the EEPROM then the built-in EEPROM Recovery Tool in ACE might be able to help, since the product controller is supported, but you would need the valid EEPROM file from the team responsible…

  • AD5668 Implementation Difficulties

    Dear Forum,

    I am attempting to use the AD5668 16-bit 8-channel DAC in a new design, and am having a hard time interfacing with the chip.

    First of all, I had a bit of confusion initially and used the 14-pin package when it is not available in a 2.5Vref…

  • SPI Engine for AD5668 fails on 9th message

    I am controlling an AD5668 DAC through the PL with the configuration shown (on a Zedboard):

    I am using baremetal to drive the axi engine. To initialize the DAC, I am using the ad5668.c function "ad5668_init" and passing in initialization parameters like…

  • RE: SYNC between two AD5668.

    Hi, Vikash.

    Yes, you are correct. The chip select for the AD5668 is the /SYNC pin. And yes, they also share the same chip select control for this particular evaluation board.

    Regards,

    Mark

  • AD5668 SPI HDL Reference Design

    Hi,

    We developed a custom board having AD5668 and are planning to connect the board to FPGA to configure and drive data to DAC. The idea is to use HW (HDL) to perform this task since the algorithm that we use runs entirely out of hardware on FPGA. 

  • AD5668驱动能力问题?

    我想用8路DA芯片AD5668,系统要求它每个DA输出通道的驱动能力大于2mA。但查看手册并没有发现它的驱动能力是多少,麻烦告知一下。谢谢。

  • RE: Regarding AD5668 Serial DAC output

    Hi Mahesh Hegde,

    Can you send on a scope plot of your digital lines, your chip select, your clock, your data line and your clear liner while you are writing to the AD5668 please? I would like to ensure all timing parameters are met. Also, Can you tell…