My customer asked us about the following question on AD5593R. Could you please reply to the following question?
Q1: The ADC data register format in AD5593R has been specified on Table 20 of AD5593R datasheet as shown below:
VLogic range is stated "1.8V to VDD" in the Power Requirements section but it is stated "1.8V to 5.5V" in other places and "-0.3V to 7V" in the Absolute Maximum Ratings.
Is it really VLogic must be lower voltage than…
Hii..I have been using AD5593R for reading sensor values and sending voltages to actuators. Unfortunately, the chip is failing randomly . When I check the connection (I2C), I found SDA is shorting to GND (~300 Ohm), because of which, when we connect this…
Would you please help to provide the AD5593R's die temperature individual in ambient-40 and 85°C?
Thank you very much!
The channel resistor of this device is 25ohm. So when the sourcing current is 10mA, the voltage drop is 0.25V. At 1/2 scale the voltage output should be 1.25-0.25=1V but the curve does not show trace crossing the 1V/10mA point.
Am I making some mistake…
What is the Maximum input voltage /Maximum output voltage supported by AD5593r. As per the datasheet VDD = 2.7v to 5.5v and if I want to use external Vref can be 1 to VDD volt. It is clear from the datasheet that ADC/DAC can work in either 0 to Vref…
Dear Support Team,
I would like to use the DAC0 with the bellow settings via i2c interface but no success.
First command: config the port
I am trying to use the AD5593r driver provided at https://wiki.analog.com/resources/tools-software/uc-drivers/ad5592r. However, I am unable to properly initialise the device driver. Would you be so kind to provide me with a code snipped to initialise the…
How can I protect the multifunction IOs of the AD5593R, when it is unpowered?
The datasheet states: "Analog Input Voltage to GND: −0.3 V to VDD + 0.3 V".
Can you provide an absolute maximum specification for the pin current, such that protection…
Hello Support team,
I'm DFAE in Japan. I received a question from my customer as for I2C timing about SCL and SDA. Is the following timing correct about the start condition? It is seems to not prescribed in I2C Bus specification.