• 关于AD5542A评估板的软件安装

    您好,

        我们从贵公司购买了SDP-B和AD5542A评估板,但是在使用过程中出现了问题,目前软件无法正常使用。

    问题具体如下。

    首先从贵公司网站 http://www.analog.com/en/products/digital-to-analog-converters/da-converters/ad5542a.html 下载AD5542A评估板的软件,如下图:


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  • how to interface FPGA based FIFO MEMORY to AD5542A d/a ic ?

    AD5542A d/a ic accepts input data via SPI. first one 16bit long sample is shifted in input shift register on rising edge of clock and t latch it to dac latch register we need  a low to high CS(active low) i. e we will need to provide some delay between…

  • Is it neccesory to use galvanically isolated interface with AD5542A D/A ic?

    In datasheet of AD5542A, galvanically isolated interface is being suggested to use while connecting AD5542A D/A ic with controller unit. I am giving controlling signal and data from FPGA to D/A ic. I am not having an idea of at what condition we can avoid…

  • what is the writing format and transfer rates required for AD5542A d/a ic?

     SPI interface in AD5542A D/A IC

  • how to solve for the output voltage of AD5542A in bipolar mode with external buffer amp?

    AD5542A gives +-Vref as output range in bipolar mode. the external output amp used for obtaining bipolar output is ADA4622-4, which is having input offset voltage +-0.8 mV at 25 degree and open loop gain of 118 dB. the equation used for calculating bipolar…

  • what is the advantage of using LDAC pin in AD5542A dac IC in terms of speed

    The aim is to design multi channel high speed digital to analog converter system. for this AD5542A dac IC is being used. requirement is to obtain max speed available in IC.

  • AD5542A having logic inputs of 0.8V to 2.4V. how to interface it with device having I/O voltages range of 1V to 1.8V.

    required to interface AD5542A D/A with xilinx's kintex utrascale FPGA 

  • Where do I tie the exposed paddle on DACs such as the AD5541A, AD5542A, AD5512A, AD5668, AD5628, AD5669 and AD5629 that are packaged in LFCSP?

    Where do I tie the exposed paddle on DACs such as the AD5541A, AD5542A, AD5512A, AD5668, AD5628, AD5669 and AD5629 that are packaged in LFCSP?

  • 10 Lead LFCSP AD5542A is not having Vlogic pin on it which provide logic power supply in case of 16 pin IC, so what will be the VINH and VINL for 10 pin D/A IC?

    on page no. 6 of data sheet in timing characteristics it is mentioned that VINH=90% OF Vlogic AND VINL= 10% OF Vlogic.