• EVAL-AD5542A with EVAL-SDP-C1Z Labview Code


    I want to control the EVAL-AD5542A with the EVAL-SDP-CB1Z. 

    Is it possible to get the Labview Source Code for the evaluation software?

     Thank you in advance for your response.

  • Output Noise of AD5541A and AD5542A


    I'm a DFAE in Japan. Our customer asks a question about AD5541A and AD5542A. Comparing the output noise spec between AD5541A and AD5542A, AD5542A is better than AD5541A. Since AD5542A has RFB and RINV, I thought that the noise would be worse…

  • AD5542A Power-on-Reset does not work

    Hi Support team

    I 'm evaluating the AD5542A, i rarely found the non-MID scale output when the power is turned on.

    To ensure POR operation, are there any recommended conditions such as power supply slew rate or linear increase?

    VDD and VLOGIC rising…

  • maximum supported sampling rate of AD5542A DAC

    Datasheet says the AD5542A are controlled by a versatile 3- or 4-wire serial interface that operates at clock rates of up to 50 MHz. And it is 16 bit dac. So what is the maximum sampling rate it can support practically for 50MHz clock and 16 bit word…

  • how to interface AD5542A dac ic with FPGA memory to provide input data to Din pin of AD5542A?

    Around 256K data is stored as a bunch in memory and we need to convert this digital data to analog at once by applying it to AD5542A dac ic. As chip select need to go low to high after each 16 bit data to latch it to dac. 

  • logic compatibility of input pins of ad5542a DAC


    I have to interface AD5542A dac with serial flash memory. Serial flash is powered at 3.3V and AD5542A is powered at 5V along with its complementary components(2.5v reference generator,reference buffer,output buffer for bipolar dac output) as it…


    trying to test ad5542a dac ic on breadboard without its complementary components(as recommended in one of the circuit notes provided for it).

    Using SPI protocol, clock @8.33MHz .power supply used is 5V ,reference input is provided 2.4V, VLOGIC=5V,CLR…

  • what is the suitable value of Vlogic in AD5542A?

    in order to operate AD5542A with 5V supply , 2.5V reference , 16 bit resolution and in bipolar mode what is apt supply to appy to Vlogic as it range from 2.7 to 5.5V.

  • how to interface FPGA based FIFO MEMORY to AD5542A d/a ic ?

    AD5542A d/a ic accepts input data via SPI. first one 16bit long sample is shifted in input shift register on rising edge of clock and t latch it to dac latch register we need  a low to high CS(active low) i. e we will need to provide some delay between…

  • Is it neccesory to use galvanically isolated interface with AD5542A D/A ic?

    In datasheet of AD5542A, galvanically isolated interface is being suggested to use while connecting AD5542A D/A ic with controller unit. I am giving controlling signal and data from FPGA to D/A ic. I am not having an idea of at what condition we can avoid…