• RE: AD5445的3引脚GND连接数字地还是模拟地

    我使用的是AD5445,在它的参考设计中http://www.analog.com/media/en/technical-documentation/user-guides/UG-333.pdf  的GND的设计是连接到数字地,而AD5445的数据手册中是连接在模拟地。这个跟AD5443不同,AD5443都是连接到模拟地,这个是什么原因?

  • What is the RF connector type on the EVAL-AD5443SDZ?

    What is the RF connector type on the EVAL-AD5443SDZ?  Is it SMB?

  • Using SYNC as a Chip Select Pin

    Is it possible to use the SYNC pin of the AD5443 as chip select, when using
    more DACs on the same interface?


    Yes, that is possible. When using more then 1 DAC on the one interface, SYNC
    operates as both the Chip Select pin and also…
  • RE: IBIS models for AD5441 & AD5446.

    Hi Tar-Bow,

    The IBIS models are available under the tools, Software & Simulation Tab in the product page.

    However, as we are building this library, it is possible that the IBIS model for the part you are looking for is not there as the case for…

  • 关于 AD5443的满量程电流

    AD5443满量程输出电流由所施加的外部基准输入电压VREF决定;Ref的电阻典型值 是10K  ;如果Vref=10V 满量程电流就是 1mA吗?  谢谢。

  • RE: AD5449 DAC output configuration


    Yes you can create differential output using AD5449, you can check this circuit note:


    Though this particular circuit note uses AD5443, the…

  • RE: ADuM6400输出电源正常,但信号没有输出

    两点建议:1. 检查输入电平是否符合ADuM6000的输入要求

                      2. 断开后面的负载,也就是AD5443,再用示波器看ADuM6000的输出。

  • RE: How to determaine the output impedance?

    Hi Ali,

    The best example or reference for your application is the CN0151. See figure 3.


    The first AD8510 is a TIA to convert the current out of AD5443. So if you are in voltage mode, disregard the first OA. The computations are shown and explained…

  • RE: AD9833's output amplification


    One possible method to do this is use an M-DAC in reverse mode (maintains single supply) and gain up the signal with an amp and some resistors. See for example Figure 44 in AD5443 datasheet. The output of the AD9833 could be tied directly to the…

  • What's the phase shift on the high bandwidth multiplying DACs and how is changing with code

    I'm planning to use a multiplying DAC e.g. AD5443 configured to provide a unipolar output and attenuate a Vref of 1MHz. Looking at the datasheet, the device bandwidth of 12MHz suggests that will be a phase shift between Vref and the output. I would like the…