See my suggestion on your other post: AD5443 Power on reset query
Please find attached file for the schematic of the AD5443-DBRD.
I hope this helps.
Thanks for help. AD5443 can't use because fspi big on my frequency sinus.
Is it possible to use the /SYNC pin of the AD5443 as chip select when using more DACs on the same interface?
How is the AD5443 quoted at 0.6uA Idd in the spec table but in the TPCs (Typical Performance Characteristics) it reads in mAs?
What is the limit on biasing the AGND pin on the AD5443? The pin description says you can bias it, but gives no limits.
Please refer to the equation below.
If the reference voltage has changed polarity, the output voltage will also change.
No schematic yet...still in the architecture stage. But having only one reference was our idea. Let's say our 10V reference can put out +/-20mA. That should be enough for the 16 loads of approximately 10KOhm. But is there a problem with them…
Is there a way to control this board with out the SDP card? From the schematics, it looks like Vdd and Vss only go to the output opamps. I want to run this independent of the USB bus and straight from our own controller using SPI. I do not want to power…
The datasheet AD5443 mentioned 'Power-on reset with brownout detection' as a feature but without any further details? Can more details be supplied? I have a design that if I power cycle too quickly (~2 seconds) then the DAC chip ignores the serial…