I just discussed about this with our customer.
He will also check this motion by one sample AD5302.
This is very important and need the answer soon.
So can anyone answer this?
I am using the ADL5802 to down convert two signals for phase comparison using the AD5302.
It appears the IF signals are 180 degrees apart when two in phase signals are put in.
Is this expected?
We are using an AD5312 that works flawlessly. It outputs the analog values we are looking for and all of the control signals look good. The problem we are experiencing is that occasionally during electrical noise it locks up and begin to Output 3 volts…
What should be happen in input shift register when SYNCb is deasserted before 16th falling edge of SCLK?
My expectation is that the content of the input shift register should be cleared and the content of the input register should not be changed…
Please confirm that if the LDAC pin is held low, then the data is clocked straight through from the input register to the DAC register. Please clarify at what instant does the DAC change its output value (after the 16th bit is clocked in? after the SYNC…