Hi all.

I have a question about Vlogic power supply.
Question : Does VL need to be always less than VDD?

Our customer are using VDD=5V, VL=5V nomaly. but sometime VL > VDD.

In D/S of AD5260 ”ABSOLUTE MAXIMUM RATINGS”

　　　　　VL to GND   0 V to +7 V

我搭了个数字电位器电路，期望使用Ad5260 数字电位器输出0v到12v的电压，我控制用的MCU的 gpio端口电压是3.3v的，vdd和A端输入电压为12v时不工作，改为5v时工作正常，难道SPI通信端口也要用12v电平？

纠结了好几天，程序硬是不通

头文件

#ifndef _AD5260_H_

#define _AD5260_H_

//M64管脚定义

#define AD5260_CS           5        //PF5 

#define AD5260_SDI          3        //PF3

#define AD5260_CLK          4        //PF4

#define AD5260_SDO          6        //PF6

//宏定义

#define CS_L  PORTF&=~(1<<AD5260_CS)       //置CS为低电平，使能SPI接口…

I am struggling trying to think out a solution to design a transimpedance amplifier (TIA) which can convert 100 nA to 10 mA. This is 5 decades. I want to be able to amplify these to 1.5V minimum. (3V max).

I want to do most of the amplification in the…

Hi

Please show me how to use daisy chain of AD5262.

In data sheet, the discription is only AD5260 single digi-pot.

I think a procedure for writing is

1. U2(A0=0)

2. U2(A0=1)

3. U1(A0=0)

4. U1(A0=1)

Is this correct ?

Best regards,

wada…