• Change sampling rate in AXI-SPI-Engine ADCs like AD4020

    Hello everyone,

    I'm currently using AD40xx ADCs connected to Zedboard through the AXI SPI Engine IP by ADI.  I'm also using meta-adi 2020.1 and also checked this with 2019_R2.  From measurements, it seems the sampling frequency is around 900,000…

  • AD4020 Linux behavior


    I'm new to IIO (though have experience in other Linux drivers) and I'm setting up an AD4020 evaluation board with Zedboard and its Linux driver.  I've followed instructions from the following links:


  • RE: CN-0513 - Reference Design (EV-AD4020-REF-DGNZ)

    Response forwarded to customer via personal email.   Information supplied to the customer is ADI proprietary information and is provided AS-IS with no guarantees or warrantees. 

  • AD4020

    Hellow! I have problem with AD4020 ADC. I use it with STM32F407 control, and it's don't answer? What i do wrong? 

    My code for STM32

    SPI1->CR1 = (0<<0)| //CPHA
    (0<<1)| //CPOL
    (1<<2)| //MSTR
    (5<<3)| //Baund rate

  • SPI interface for AD4020


    I have been using the AD4020 eval board for a few months now. I am very satisfied with what the ADC has to offer. However for my future needs I have to integrate it into my existing PCB. The hardware for this is pretty much open source and I was…

  • AD4020 in single-ended operation

    Recently got my EVAL-AD4020FMCZ. Want to use AD4020 for single-ended conversions within [0...+5] V, but i'm not sure if i can make it without using ADA4940 or similar.

    What is the reason analog inputs beeing pulling up to midscale value of reference…

  • AD4020 eval board external supply


    I wanted to externally power the AD4020 eval board. After going through the datasheet of the eval board I figured out that I had to do the following changes.

    Switch SL9 for +Vs

    Switch SL8 for -Vs

    Switch SL7 for Vdd

    Switch LK2 for Vref

    On the eval…

  • AD4020 高精度ADC

    碰到一个问题  AD4020在没有信号输入的情况下采集基线,采样得到的值是11后面18个0 ,每次采样的值都是这样,一点变化都没有

  • AD4020 SINAD degragradation vs Frequency with S/H input

    The AD4020 data sheet indicate that SINAD degrades 6.5dB at Fin=400kHz compared to Fin=100kHz. Will this be true if the input looks like it is sampled and held?

    I have an application where I'm outputting 32 signals via a mux at 1.5 MHz to the ADC. The…

  • IIO Oscilloscope plot channel display issue with multiple AD4020 devices

    Hi there,

    I've an FMC board with 4xAD4020 on it, connected to a Zedboard. There seems to be display issue with how the channels of each individual device are shown in the tree. I'd expect one voltage0 channel under each ad4020 node, but they all seem…