• AD4000 ADC.

    We are trying to set the command register for writing operation and set the ADC to 2MSPS Turbo Mode. But we are unable to read the register status as SDI and SDO have different polarities. We are trying to send the command as described is page 26 of AD4000…

  • AD4000 SPI Timing

    Hello, I am trying to implement a SPI driver for the AD4000 on the UG-1042 eval board. The goal is to use 4 wire mode since we will need to enable high-z mode.  We are first trying to enable a conversion. It seems like bit is shifted out of the ADC as soon…

  • AD4000 series Status register

    I am connecting with an AD4003 using an FPGA and have already successfully gathered data using the 3-wire mode. However, I do not seem to be able to read back the status register (and perhaps I might not be writing correctly either). I have re-read the…

  • AD4000 Serial Interface Issue

    I am working with the EVAL-AD4000FMCZ module to investigate operation of an AD4000/4004 with an MSP430 uC.

    I have wired the SPI lines (SCLK, SDO, SDI, and CNV) between the two. External wires are used. Definitely not the best configuration.

    Anyway, I…

  • RE: AD4000 reference voltage and power consumption

    Hi Mohi,

    In this comment I'll respond to the query on the AD4000 REF input drive requirements (i.e. buffered vs. un-buffered voltage reference).

    The short answer is "it depends" and it is a function of the sample rate of the AD4000 and the accuracy…

  • RE: Example c-code to read ADC data from AD4000

    Hi Mohi,

    Thanks for pointing this out. It turns out this is a typo in the data sheet. Bit[7] is 1 on power-up but then is 0 on subsequent reads, while Bits[6:5] are supposed to return 1. So the behavior you are seeing is intended device operation.


  • top module HDL(FPGA) design for AD4000

    Hello support team,

    Now I'm designing Xilinx program as host for AD4000. That is, I'm trying to design for evaluation of EVAL-AD40XX-FMCZ with AC701. Now, I already have gotten the HDL design which is provided by ADI on the AD4000 product web page. There…

  • AD4000系列的ADC采样CONV必须要一个上升沿吗?

    从ADI AD4000系列的手册中看到,启动CONV需要一个上升沿,这里能将conv接标准的SPI的CS脚吗?标准的SPI的CS脚不会产生上升沿。

  • RE: Using AD7680 for ultra low sampling rate

    Hi Sean,

    The decision is to use AD4000 to future proof the design and also to avoid the long cable run of analog signal to a centralized processing unit.

    One question about the power consumption of AD4000. It is 1.8V device; however, the current consumption…

  • RE: Looking for product longevity advice (Roadmap) with integration of Linear Tech

    Hi Phil,

    The AD7691 is part of a 10 pin SAR family that are pin and package compatible. You can see this in the parts table in the AD4003 datasheet (table 8). The most recent release in this 10 pin compatible family is the AD4003 which was released last…