• Power Consumption in AD10242

    Hello!

    As per datasheet:

    AD10242 : 12 BIT, 40MSPS, Dual ADC, 1750mW Power

    If I use this ADC at a lower sampling rate say 10 - 20MSPS (if its possible) and single channel,  then power is reduced or not? If yes, then let me know.

    Thanks,

    Regards,

    Dars…

  • An issue about AD10242

    Dear Sir/Madam,

    I have an issue about AD10242,.

    I wonder whether the encode input could accept ECL signal or LVPECL signal.

    what's the input range for the encode of AD10242.

    thanks.

    BR,

    Peng

  • AD10242时钟差分输入的问题

    在使用AD10242时遇到问题。

    在时钟输入上你们提供了单端输入的电平标准,即当cmos电平0.8-2v,这个在手册中已经说明,但是并未提及差分时候的标准。但是在手册的Figure 11 中显示可以使用标准ECL GATE 驱动时钟,但是一般认为ecl的摆幅只有0.8v

         我的问题是:1 ecl差分接入的0.8v摆幅是否可以驱动ad10242,lvpecl电平是否可以满足标准?

                               2 figure 11 中的终端电阻510欧姆是怎么计算出来的

                                      谢谢

  • what is the input signal frequency range in AD10242 - 12 Bit 40M Samples per Second Analog to Digital Converter (ADC) Evaluation Board

    I need a  Analog to Digital Converter (ADC) Evaluation Board with following specification.

    (i)Analog Input channels ; 1 or 2                                                   
    (ii)  Analog input voltage ±- 1.5 volt
    (iii) Analog input signal frequency: DC to 50 MHz or more      
    (iv) Sampling frequency around…

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