• RE: LOg amplifier AD 606

    Greetings Hans,

    I'm not so familiar with AD606 because it's a very old part. Nonetheless, most log amps such as this have three elements that determine the low-frequency response or cutoff:

    1) input coupling capacitors.

    2) internal DC offset cancellation…

  • BF-606 Interrupts

    Hi, everyone.

    The problem is the following. I need to organize software reset of the BF606.

    There is core timer interrupt with 100 us period.

    I declared watchdog timer interrupt with 500 ms period. Watchdog timer interrupt containes software reset…

  • BF-606 shared memory

    Hi, everyone.

    There is an array or some data in shared memory declared like this:

    #pragma section("L2_sram")
    volatile TmyData myData;

    Core1 writes data to variable myData and Core0 reads value of myData. My questions are:

    1. What will happen…

  • ICE-1000 Emulator sporadic fault

    Hello, everyone

    I use ICE-1000 emulator for debugging dsp BF-606 code. I've got BF-606 and connected ADC AD7817 via SPI. The code is developed in Cross Core Embedded Studio 1.2. The problem is the following: when using ICE-1000 (expression window is…

  • [#5350] Build bf526 kernel failed at traps.c

    [#5350] Build bf526 kernel failed at traps.c

    Submitted By: Vivi Li

    Open Date

    2009-07-13 23:33:13     Close Date

    2009-07-13 23:36:09

    Priority:

    Medium High     Assignee:

    Nobody

    Status:

    Closed     Fixed In Release:

    N/A

    Found In Release:

    N/A     Release:

  • RE: Watchdog on BF609

    Hello,

    We suggest you to refer the Watchdog Timer (WDOG) section (PageNo:687 / 2278) in the HRM of ADSP-BF609. An example code can be found in the below Ezone thread.
    https://ez.analog.com/dsp/blackfin-processors/bf60x/f/q-a/59575/bf-606-interrupts

  • RE: Don't undestanding RX_SAMP_FREQ of AD9361

    Hi Di,

    2. I write the 6000 samples to DDR with the HDL and then the ARM read them, After this, I print the samples in the console, then I copy them to Matlab.

    3.

    figure; plot(t_signal);title('TEMPORAL');

    figure; stem(abs(fft(t_signal,1024…

  • RE: ad9361 filter design wizard

    Hi Travis,

    I have the same question, but as you said the minimum sampling rate is 520.3333kHz, I designed the filter with data clock as 520841.

    I saved the coefficients as .c files and copied the generated AD9361_TXFIRConfig and AD9361_RXFIRConfig structure…

  • RE: The SHARC Audio Toolbox Offchip Delay ExtPort Module

    Hi,

    Data32 required for the OffChip Delay External Port module is equal to 2*MAX_BLOCK_SIZE*RepCount + 94 words for each instance of OffChip Delay module. Since, MAX_BLOCK_SIZE is now set to 256 in adi_ext_config.h, this is now equal to 512 + 94 = 606…

  • RE: Issue SEM of AD9363 on NB-IOT application

    Hi Vinod,

    We try to back off 10dB as below but it still fail as below. Besides, would you kind to check FIR filter generated by filter wizard which based on BW=200KHz, data rate=30.72Mbps. Do you have any recommend for it ? Thanks.

    BW=200KHz,DR=30.72Mbps…