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Problems concerning SDP-H1 and AD7606C-16 board

Category: Software
Product Number: EVAL-SDP-CH1Z and EVAL-AD7606C16FMCZ

we are currently working on prototyping a digital filter. For that, we purchased a SDP-H1 board with the AD7606C-16 evaluation board and are facing some issues while trying it out in ACE.

  1. When using parallel interface every sampling rate above 670 KSPS gives oscillating results, where the signal seems to be split between multiple channels. E.g. in the pictures below, a 1 kHz, 2 Vpp sine wave is connected to channel 1 while all other channels are grounded. Only the sampling rate was changed:
  2. When using serial interface 1 MSPS works, but everything between 700 and 999 KSPS gives different errors. Again, only channel 1 has an input.

  3. Whenever a signal is captured in ACE  multiple (>20) of the same errors occur, even with the default configuration:

    7/5/2023 2:56:53 PM





    Value must be between -180 and 180

    While it states the problem, no such value could be found. This doesn’t stop the software from working, but it is still confusing.

  4. We couldn’t find any documentation on how to create and load a custom program on the uC and/or FPGA. We do have a XLINX JTAG program available. Do you have any further documentation or example projects? Or is the board really only usable with the ACE software?


Points 1 to 3 were tested any found on two separate SDP-H1 and AD7606C-16 boards as well as on two different computers.

Any help or links to suitable ressources would be greatly appreciated.

Thanks, Nico

  • Hi Nico,

    I did a quick check on EVAL-AD7606C18 and I could not see such issue. Will try on AD7606C-16 as soon as I can get my hands onto one board.



  • Hi Nico,

    There are 3 main components here - the AD7606C-16 evaluation board (EVB), the ACE plugin for that EVB, and the SDP-H1. The SDP-H1 is my area. 

    Points 1 to 3 need someone with in-depth knowledge of the plugin and perhaps the EVB - I will contact the relevant engineers and direct them to your question.

    Point 4 - The SDP-H1 (and the SDP-B and SDP-S) were designed for evaluation use only.  I think it would be a very arduous task to create a custom solution on the SDP-H1's FPGA or Blackfin. It's not something we support.

    We are moving to open-source, portable solutions that can be used for Evaluation and Prototyping.  At least some of the AD7606x family are already supported in IIO and NoOS, but you will need a different controller board to use IIO or NoOS.

    For example, there is some support for the AD7606 on the SDP-K1 using IIO - AD7606 IIO Application [Analog Devices Wiki]  (I would need to the confirm the specifics of the support for the AD7606C-16). That example requires some jumper wire connections, and it uses serial mode output from the AD7606. A Zedboard FPGA board might be another option - I will consult my colleagues who specialize in IIO/FPGA solutions.

    For a microcontroller solution, there is also sample NoOS code - AD7606 - No-OS Driver [Analog Devices Wiki]