Source: STATS ChipPAC Application Notes fcBGA / fcBGA-H 19 March 2012, Rev 1
1) Introduction:
Flip Chip interconnection typically provides the ultimate in miniaturization, reduced package parasitics and enables new paradigms in the area of power and ground distribution to the chip which are not feasible with other traditional packaging approaches. STATS ChipPAC’s high-end BGA Flip Chip packages include the fcBGA, fcBGA-SiP, fcBGA-H, fcBGA-MP and fcBGA-SS2/SS3. The fcBGA package is the main platform in this package sub-group, which also includes a thermally enhanced version with heat spreader (fcBGA-H) and a package subsystem meeting the standard BGA footprint that contains multiple components within the same package (fcBGA-MP). STATS ChipPAC’s Flip Chip BGA packages are available in ball counts ranging from 220 to 3213, body sizes from 12 x 12mm to 55 x 55mm and various package formats. STATS ChipPAC offers full turnkey services ranging from design through production, including high speed, high pin count digital and RF testing.
2) PC Board Design Guidelines:
The fcBGA is compliant with JEDEC MS-034. IPC-SM-782 usually dictates the guidelines by which the PC Board (PCB) pattern should be designed. Working with an Electronics Manufacturing Service provider and/or PCB design house with experience designing and mounting this package type is recommended. The following guidelines are offered based on best known practice at the moment based on STATS ChipPAC evaluations and research. JEDEC MS-034 Compliant: 1. Package Height: • fcBGA: 1.17, 1.35, 1.56, 1.76, 1.96, 2.03, 2.13, 2.33 and 2.45mm nominal thickness • fcBGA-H: 1.35, 1.47, 2.52, 2.92, 3.0 and 3.10mm nominal thickness • Package height typically varies with body size, ball size, substrate layer count, die thickness, heat spreader, etc 2. Package Size: 12x12mm to 55x55mm 3. BGA Ball pitch: 0.5mm (small body, thin profile), 0.8mm, 1mm (typical pkg platform) The fcBGA package is primarily composed of an ABF buildup substrate with BT core. This adds stiffness to the package and uniform expansion during board mount and board level temperature cycling. Also, because of the flip chip die up configuration, the solder balls for this package are typically placed in a complete array over the entire bottom side. Therefore, balls immediately under the die may be used as thermal paths to further enhance the thermal performance.
PCB Land Pattern and Solder Mask Design:
A typical package outline and appropriate tolerances are shown below. The solder lands on the package side are always Solder Mask Defined (SMD). The land pattern on the PCB should be designed according to solder registration opening size (SRO) on the package as shown in the table below. The land on the PCB should be Non-Solder Mask Defined (NSMD) in order to realize the best board level reliability performance. The diameter of the solder ball land on the PCB should be the same or up to 20% less than that of the package substrate solder land. Designing PCB land diameter equal to that of the substrate is quite common, however, making the NSMD land pad on the board a little smaller can increase the stand-off and can increase the board level reliability. The solder joint during board level temperature cycling will typically fail at the solder ball to package substrate interface if the lands are the same size; slightly decreasing the PCB pad land will not cause failure to shift to PCB to ball interface and may positively impact the number of cycles before the solder ball to substrate interface fails. The trace leading into the NSMD ball land on the PCB should not exceed more than 50% of the land diameter. Again, this is to avoid too much solder wetting of this lead-in to the ball, thereby creating too much ball collapse and possibly impacting board level reliability.
PCB Thermal Via Design:
• The flip chip die up configuration of the fcBGA package thermal vias in PCB design provide an effective method of improving the thermal performance.
• Thermal performance is typically dependent on package size, die size, substrate layer and thickness and solder ball configuration. Thermal simulation for specific package applications should be performed to obtain more reliable thermal performance of package. Thermal performance data of typical package configurations are listed below:
3) Board Assembly Guidelines:
Most reputable EMS providers have their own rules, guidelines and standard practice regarding mounting surface mount packages in general and the fcBGA type package in particular. However, the following guidelines and principles have been characterized and proven to result in a reliable board assembly:
Stencil Design:
- Laser cut stencil with electropolished walls is recommended.
- Aperture size to PCB pad size is typically 1:1 ratio with .125 to .150mm thick stencil.
- For 1.0mm pitch, aperture can be increased to be 0.05mm bigger than PCB pad size and made square to increase solder volume (increasing stand-off), if necessary.
Paste and Reflow:
- Water soluble or No-Clean paste can be used (Type 3).
- 37%Pb-63%Sn eutectic paste
- Sn-3%Ag-0.5%Cu lead-free paste
- The reflow profile depends on the thermal mass of the other packages on the board. The fcBGA package will most likely be one of the higher mass packages on the board. Internal studies have shown good results when using the following reflow guidelines based on the solder paste used:
- For eutectic SnPb paste: The reflow peak temperature should be kept in the 215°C to 225°C range. An actual reflow profile used to produce good board level reliability result is shown below (no clean paste):
- For Pb free paste: The reflow peak temperature should be kept in the 225°C to 245°C range. An actual reflow profile used to produce good board level reliability result is shown below (no clean paste):
- No Clean pastes typically have shorter reflow profiles and dwells as the alcohol based solvent activates rapidly. Follow the paste manufacturers recommended profile and application notes. Also, no clean pastes have flux that is typically less active, so reflow in a Nitrogen environment (<75ppm) may be advised.
Rework:
- The fcBGA type package is relatively easy to rework due to high package stiffness.
- Bake board at 125°C at least 2 hours prior to part removal.
- Make sure board is flat to avoid tilting and improper removal that could cause bridging of solder.
- Because of the mass of this fcBGA package, under board heat is not normally required, although may be necessary for the 31mm square packages and above. Where underboard heating is required maintain approximately 120°C.
- Make sure hot gas nozzles are properly directed at part to be removed.
- PbSn: Peak temperature should be 200°C
- PbFree: Do not exceed peak temperature of 225°C if possible.
- Lift off part with integrated vacuum pick-up and clean the site properly with solder wick or alternative method.
- On rework printer/placer, take care to properly align and print the same solder paste with a metal blade and the miniature stencil.
- Properly place the new package within 0.15mm accuracy if possible and use the same reflow profile as used to initial mount package.
For more information on thermal characteristics of the IC package check out this article https://www.analog.com/en/resources/technical-articles/thermal-characterization-of-ic-packages.html