Hi Team,
As part of the SSI interface verification, we have verified the Rx interface using the adi_adrv9001_RxSsiTestModeCfg_t
feature. Both RAMP_16_BIT
and FIXED_PATTERN
are working fine without any issues.
After Rx validation, we started Tx validation using Tx loopback to Rx.
In this Tx loopback test, we observed that the Tx data is getting left shifted by 1 bit, and the 16th bit is seen on the LSB (it’s like a rotate shift left).
For example:
- Tx data
0x8000
is transmitted on both I and Q. When captured at the receiver side with loopback, the data seen is0x0001
. - We tried with different data patterns like
0x0010
, and at the receiver, it’s seen as0x0020
. It’s always a 1-bit rotate shift left.
What could be the issue causing this behavior?
Regards,
Siva.