Control GPIO Pins and How to change HOP time

Hi Oliver,

we will get back to you.

Regards

Rahul 

Hi,

Coming to control the HOP timing, if we are using the DGPIO for controlling the table index then it’s up to the user to generated the required signals to toggle the PIN so that it meets the requirement of 100ms, one way to do that is to enable the Auto TDD option  under the Automated TDD tab and provide appropriate clock value for the assert and deassert so that the HOP table increment automatically for every 100ms or scripts can be used to toggling the pin

Please find the explanation below

Lets divide the explanation into three section,

Section 1: HOP signal, TX/RX Pin Enable

This section will explain how the HOP signal in combination with the TX and RX Enable pin are utilized. The two signal HOP and TX/RX signal will allow you to either select the TX channel or Rx channel. As you can see from the above figure we are using HOP mode a PPL MUX retune, so when the HOP signal is low-to-high/high-to-low and the  TX pin is high then the TX channel is enabled and on the other hand when the HOP signal is low-to-high/high-to-low and RX pin is high then the RX channel is selected. One has to note that the effect will be reflected in the next fame. Since for the table index to increment the HOP signal can be from low-to-high and high-to-low along with the TX and RX enable pin, the time between the HOP signal from low-to-high and high-to-low has to be kept long enough by the user to meet the timing requirement of changing the frequency in your case its 100ms.

Section 2: HOP Table Increment Indexing using PIN

This section will explain how the entries within the table is increment using the PIN (DGPIO)

We can assign up to 6 DGPIO for selecting 64 (2^6) possible index within the HOP table. The DGPIO has to be set high or low based on the index before the HOP is triggered, so that it will increment in the next frame.

Section 3: Gain and Attenuation control

Similar to the section 2, adrv9001 allows to select the pin (DGPIO) for controlling the gain and attenuation. This is done by enabling “GPIO control of Gain and Attenuation” , then assigning the DGPIO pin and based on the code you can assign DGPIO pin high or low for the respective attenuation and gain as shown below

Please have a look at the recently updated user guide  (https://www.analog.com/media/en/technical-documentation/user-guides/adrv9001-ug1828.pdf) for knowing more about the Auto TDD and Frequency Hopping section.

Regards

Rahul 

Thank you for the detailed response, I wasn't aware the UG had been updated.

When you say clock, do you mean to switch from using the on board clock source to an external Signal Generator? 

What is the recommended method for toggling the pins?
I am currently using an Arduino however I am not able to assign more than 2 pins in TES.  Currently i have only managed to assign Pins 0 and 1.  

To my understanding I have got the table indexing to almost work using Arduino, I just need to know how to allow for more than 4 hops.
Secondly, I need to know what will cause the hop between PLL 1 and PLL2? does this use the NCO (Numerically controlled oscillator) if so, can it be done using thew LOs and MUX pre-process Hop mode? 

Thirdly, how can I access the PLL Lock (Lock detect) for if I want to measure settling times as part of my evaluation?

What would the Software and hardware set up look like for something like this? 

I apologise for my bombardment of questions, but appreciate all the help thus far. 

Hi Oliver,

When I say clock the value entered in the Auto TDD are based on the clock cycle, details are provided in the Userguide. For using the both the PLLs, I have already answered in the pervious post of yours  Implementation of Frequency Hopping using an external Trigger Rest of the question have been covered in the user guide.  If using our provided platform you only need the FPGA and the adrv9001 eval board else you need to program it in Arduino for toggling the DGPIO pins externally.

Regards

Rahul