Hello,
We are working on a project incorporating ADRV9002 that requires specific setup that does not seem to be possible to obtain using TES GUI. In our project we need TX1, RX1 and RX2 to use the same carrier frequency sourced from internal oscillator LO1 of ADRV9002 and channel TX2 to use different carrier frequency sourced from LO2. We do not want to retune the LO frequency because time between transmission on TX1 and TX2 can be shorter than time it takes to retune LO (up to 750uS according to the documentation).
Based on documentation configuration where TX1, RX1 and RX2 are connected to LO1 and TX2 is connected to LO2 should be easy to achieve by setting the MUXs accordingly (see figure below - UG-1828 Rev. PrC, page 97):
However such setup cannot be obtained directly from TES. We can achieve this (and it seems to work as well) by manually editing the profile generated by TES, as shown below:
Profile generated by TES:
.rx1LoSelect = ADI_ADRV9001_LOSEL_LO1,
.rx2LoSelect = ADI_ADRV9001_LOSEL_LO2,
.tx1LoSelect = ADI_ADRV9001_LOSEL_LO1,
.tx2LoSelect = ADI_ADRV9001_LOSEL_LO2,
Modified profile:
.rx1LoSelect = ADI_ADRV9001_LOSEL_LO1,
.rx2LoSelect = ADI_ADRV9001_LOSEL_LO1, <- modified line of code
.tx1LoSelect = ADI_ADRV9001_LOSEL_LO1,
.tx2LoSelect = ADI_ADRV9001_LOSEL_LO2,
We have confirmed that the ADRV9002 has stopped retuning the PLL after a profile change by tracking the bits corresponding to LO1 and LO2 locks from GpIntStatus.
Is there anything We’ve missed or are there any side effects we should expect?
