AD9371: LO Leakage Calibration through ORX2

Can you enable only ORX2 in the init config using the below API and initialize the chip and then check.,i.e, only TX1 and ORX2 should be enabled with a  proper external feedback path between both of them.

mykonosObsRxSettings_t 

If you disable the external TX LOL cal  and then run the init, are you able to pass the initialization with TX1 and ORX2 enabled?

hi srimoyi,

AD9371_OF_PROP("adi,obs-settings-obs-rx-channels-enable", &phy->mykDevice->obsRx->obsRxChannelsEnable, MYK_ORX2);

    AD9371_OF_PROP("adi,obs-settings-obs-rx-lo-source", &phy->mykDevice->obsRx->obsRxLoSource, 0);
    AD9371_OF_PROP("adi,obs-settings-sniffer-pll-lo-frequency_hz", &phy->mykDevice->obsRx->snifferPllLoFrequency_Hz, 2600000000U);
    AD9371_OF_PROP("adi,obs-settings-real-if-data", &phy->mykDevice->obsRx->realIfData, 0);
    AD9371_OF_PROP("adi,obs-settings-default-obs-rx-channel", &phy->mykDevice->obsRx->defaultObsRxChannel, OBS_RX2_TXLO);

These are already set in ad9371.c file. Please tell if i have to set any other parameter.

"If you disable the external TX LOL cal  and then run the init, are you able to pass the initialization with TX1 and ORX2 enabled? " - I will check

Can you check on Eval board TX LO External calibration with ORX2 ?

Thanks
Mahima

Just to confirm, in the tx obsselect, as you have given a zero input, have you pulled the   gpio 0 pin to low which indicates to the ARM that the TX1 pin is routed.

I did not understand your question completely.

Are you talking about useTx2EnablePin ?

No. GPIO 0  should be pulled to low so that the routing of the TX1 path for calibration is informed to the BBP.

Hello, Thanks for the reply.

txObsSelect is already pulled to zero.

I am still not able to calibrate. Can you try on Eval board?

Hello,

I have tried on Eval board TRX 1 LOL External Calibration with ORX1.

It is working. But everytime whenever i am checking TX lol status, percentcomplete is showing 64 percent and iterCount is incrementing by 3.

Do i have to enable bist tone for callibration ?

Please suggest.

Hope you have connected the external path from TX1 to ORX1. What is the signal level and the LOl level that you are getting at the ORX output after running this cal?

Are you operating the chip in FDD mode?

Yes i have connected the external path from trx1 to orx1. Observation power is 12dbfs. Yes the chip is operating in FDD mode.

After running calibration . lo leakage is -85dbm at 1842.5MHz.