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AD9528 clock not synchronized

Thread Summary

The user encountered an 'AD9528 clock not synchronized' error when using a ZC706 board with AD9375 and TES. The issue was resolved by ensuring the REF_CLK is set to 30.72 MHz in the TES GUI and avoiding resetting the FPGA while TES is running. If the FPGA is reset, TES must also be reset to prevent the error.
AI Generated Content

Hi,

I am trying to use ZC706 and AD9375 with TES.

I am using a 30.72 MHz external clock for the AD9375

I am getting the following message "AD9528 clock not synchronized"

How can I solve this?

Thanks,

Yaniv