Initilization Problem When Bypassing Channelizer Path

Question

Hi, I am trying to test bypassing the channelizer path on AD9081 (Channelizer Interpolation Factor (N) = 1) in order to provide maximum data rate (1500 MSPS) limitation. However, I encountered an initilization problem. I can not see any spectrum when I debug it. After I programmed it, I read IRQ_STATUS_0 (0x0026) register different (DAC IRQ STATUS = 0xf043000000) than I expected on the serial terminal. I also see that it prints IRQ _Status0 = 0x0, ad9081_multichip_sync: 2 and ad9081_multichip_sync : 3. When I use interpolation factor (N > 1), I read this register as (DAC IRQ STATUS = 0xf043000040). I do not know what is the problem. Do you have any recommendation about this problem to solve it.

kberry · Accepted Answer

Are you seeing an output tone as expected when bypassing the channelizers with N=1? If the IRQ status ends 0x40 it means the JESD receiver is ready; 0x00 means it is not ready. When it is not ready, the code will run multichip sync steps 2 & 3, which toggle the JESD receiver enable. If there are any issues with the jesd or clocking parameters (dac clock, interp, as discussed) then link would not be ready for data. However if you are seeing the jesd link working with N=1 but still getting this 0x00 status that is curious.)

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Initilization Problem When Bypassing Channelizer Path