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AD9207 FD_DWELL_THRESH_UP registers not described in UG-1578


UG-1578 shows two registers FD_DWELL_THRESH_UP_LSB and FD_DWELL_THRESH_UP_MSB on page 153.  

I cannot find any explanation as to what these registers do in UG-1578. (Apologies if I'm mistaken).

What is the purpose of FD_DWELL_THRESH_UP and does it apply to both FD0 and FD1?


Parents Reply
  • Hi,

    I have updated the UG-1578 to reflect the information in this ezone thread. UG-1578 is now sitting in our technical documentation queue along with other changes to be made. I would anticipate the update document to be published with the next two months.

    I am checking with the API team to confirm the code and register details. I will let you know when I hear back. 


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