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Using an External Clock with AD9081-FMCA-EBZ

Hello,

We are trying to get a simple output on one DAC using an external clock fed into the AD9081-FMCA-EBZ and ADS9.  We have followed the datasheets (UG-1829) and have performed the following:

1. Removed C3D and C5D and have populate C4D and C6D with the recommended capacitors (Page 11).

Following the setup on Page 22:

2. Connected the 10MHz references of our two signal generators together (Page 22).

3. Set the input frequency to the AD9081 to 6GHz.

4. Set the input frequency to the ADS9 to 750MHz.

5. Attempted to change the settings so that they match the information on Page 23, but the ACE software reports errors for the JESD interface.  TX Reset Error and occasionally others, particularly on the RX line.

Additional Notes:

1. We don't have any need for the ADCs currently, so we ignored step 4 in the setup process for "Setting up the AD9081 or the AD9082 in full bandwidth mode with external clocking."

2. We are able to get a CW tone out of the DAC using the onboard clock from the HMC chip and an application that we installed following the MxFE_Eval_App_Extras_User_Guide_v1.1.0 document.

3. We want to do this same thing, but with an external clock.

Parents
  • FormerMember
    0 FormerMember
on Jan 25, 2022 11:52 AM

Hello,

On the ACE Plug-in Configuration Menu for "Clock Source" setting..................have you selected "External Direct Clocking" with Enable on-chip PLL box "unchecked"


  • FormerMember
    0 FormerMember on Jan 25, 2022 12:16 PM in reply to FormerMember

    Also.............you can not ignore Step 4 since providing the Ref Clock to the ADS9 is required for FPGA SERDES PLL to be phase lockd to SERDES PLL on the AD9081.

    Please connect 750 MHz clock source to ADS9V2 ExtClk SMA connector.  Also........the frequency should be set to what the GUI display setting for "Tx Ref Clock" under CLOCK CONFIGURATION.

  • Step 4 is setting the analog input to the ADC, but also says to leave it off.  You're saying we still need to do that?

    We are providing the 750MHz clock (see Step 4 in the OP), with External Direct Clocking chosen.  The Tx Reference Clock in the GUI is an un-editable field and appears to change based on other editable selections such as "Tx Data Rate"

  • These are the settings that we currently have:

  • FormerMember
    0 FormerMember on Jan 25, 2022 3:09 PM in reply to sdepot

    With the settings shown..................Provide a 12 GHz, 13 dBm signal into the Ext Clk SMA on FMC board.

    Provide a 375 MHz 4 dBm input into the ADS9V2 board Ext Clk SMA connector.

    Hopefully that works.

  • I think the bigger issue is that when we select those settings, ACE throws a bunch of errors.  Unfortunately, the board requires modification and we can't wait to get this working so for now we are using the internal clock, as we were able to get that working.

  • Thank you for your assistance.. We will try your suggestions when we have time to go back to trying external clock sources.

  • FormerMember
    0 FormerMember on Jan 25, 2022 3:52 PM in reply to sdepot

    OK.............but note that no further board modifications should be  required after installing C4D and C6D.  Anyways........glad to see that you still can progress with HMC7044 based clocking solution.

  • PMH Thank you for the help. I am a colleague of sdepot. When we run the FMC with the internal clock we are able to get a signal out, but we are also seeing several double sideband spurs. They are located at +/-50kHz, +/-297kHz, and +/-520kHz. have you seen these spurs, and what can we do to eliminate them?  

  • Hello,

    For the JESD 375MHz clock, what kind of clock is the ADS9 looking for?  Square wave centered at 0, square wave with offset (so no negative voltage), sine wave centered at 0, other?

  • We noticed that when we hit the 12GHz with +13dBm that it results in more spurs apparently from overdriving it.  Would you suggest using a lower power input?  If so, what value?

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