pFIRs are stored in the MxFE using a SPI interface, however they can be loaded via the GPIO pins during MxFE operation. The pFIRs come directly after the ADC Core and therefore see no decimation and run at the ADC sample rate (4Gbps).
pFIRs are stored in the MxFE using a SPI interface, however they can be loaded via the GPIO pins during MxFE operation. The pFIRs come directly after the ADC Core and therefore see no decimation and run at the ADC sample rate (4Gbps).
, additionally, if you have to constantly update the pFIR, you will have to stream the coefficients continuously via SPI. The SPI port is rated for a max speed of 33MHz. Do you have a specific use case in mind?
This was a customer question from one of the webinars on hardened DSP in the MxFE vs. FPGA DSP. A particular use case was not specified. The note about speed at 33MHz is helpful. Thanks!
