AD936x_DCOFFSET_ISSUE

ISSUE:

DC offset correction algorithm fails sometimes whenever there is a signal very close to DC (less than 7.5 kHz).

DESCRIPTION:

AD936X uses two level of DC offset correction: RFDC offset correction and baseband DC offset correction.

For Rx gain table, the RF DC offset calibration only calibrates at gain indexes that are designated to calibrate in the Rx gain table, the internal calibration results are stored in a separate LUT for the RF Rx input. The RF DC offset correction algorithm samples the baseband digital data and calculates correction coefficients. Then it injects a correction signal as an analog current into the TIA stage.  These coefficients are stored in LUT.

The BB DC offset algorithm accumulates samples and accordingly corrects the DC level by injecting an inverted signal. Before injecting the correction is attenuated using binary shift method, one bit gives 6 dB attenuation. The number of bits that each sample is shifted by is programmed using M-shift parameter. Less attenuation (lower M-shift value) means more correction near DC and signal near DC will have more effect, similarly more attenuation (higher M-shift value) means less correction near DC and less effect on signal near DC. The baseband DC offset correction values are stored for all the Rx analog baseband filter gain steps.

If the algorithms sampled for an infinite amount of time and then only updated at the end of the sampling period, they would only be affected by DC and in turn, the corrections applied would only affect DC.  The algorithms, however, have finite sampling periods and they apply corrections at different finite intervals.  For this reason, both algorithms are sensitive to signals close to DC.  The above mentioned two algorithms attempt to compensate for signals (or interferers) which are close to DC in addition to the DC offset signal itself. This can distort the desired signal by reducing the signal level which in turn can cause gain control algorithms (including the AGC in the transceiver) to adjust the receive signal path gain in response to the changing signal level. Very large external signals close to DC can cause the RF DC Offset algorithm to get into a state such that it can’t recover without outside intervention.  The correction coefficients remain at their maximum values even if the signal close to DC is removed.

TYPES OF SIGNALS CAUSING THE ISSUE:

Signals which are closer than 7.5 kHz to DC can cause this issue. For modulated waveform the energy is spread across frequency which can mitigate some of the effects mentioned above.  Single tone (CW) signals close to DC will have the largest effect since all the energy is concentrated (theoretically) at a single frequency.  As signals get larger in the digital domain or closer to DC, the effect can be more pronounced.

ADDRESSING AND READING RFDC OFFSET COEFFICIENT:

The RFDC offset correction coefficients can be read from the registers as mentioned in table 1.

If using the AGC this reading process could be more painful.  The best way to read the coefficients is to read them all and the only way to do that is to put the transceiver into MGC mode and manually step through the entire LUT. The alternative (leave it in AGC mode and just read back the coefficients pointed to by the AGC) could miss a coefficient stuck at 0x200 but it relieves from having to move to MGC mode which could bring the system down for too long.

                              Table 1: RF DC Offset Correction Words.

The correction coefficients can be periodically read to determine if this situation has occurred. If a coefficient in any gain index equals 0x200, it’s highly likely that the RF DC offset algorithm is not recovering from an overloaded state.  To recover the system, put the transceiver into the Alert state, make sure that the transceiver input port is isolated from any input signals and run the BB and RF DC Offset initialization calibrations. The entire table of correction words will be re-written with optimized values.  Enable DC offset tracking and transition the system into an operating state.