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Design Support AD9361/AD9363/AD9364
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Frequently Asked
Regarding the multiple AD9361 reference clock input using 1:8 clock divider
Answered
3 months ago
AD9361 Tx Attenuation Setting
Answered
over 3 years ago
AD9364 TX/RX path latency
Answered
over 3 years ago
AD9361 use for non-0 IF
Answered
over 5 years ago
Baseband PLL won't lock
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over 4 years ago
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Suggested Answer
Frequency Hopping HDL Code Generation Example Project
0
53
views
3
replies
Latest
1 day ago
by
bb0667
Suggested Answer
AD9361 CMOS interface for full duplex FDD
0
53
views
3
replies
on
Sep 23 2023
by
abpreen14
Not Answered
How to minimize the leakage of a strong interferer into the passband of our desired signal?
0
43
views
2
replies
on
Sep 23 2023
by
Rod3
Answered
AD9361 SPI Issue
0
578
views
4
replies
on
Sep 22 2023
by
ShubhamTupkar
Not Answered
AD9361 SPI Communications
0
167
views
2
replies
on
Sep 22 2023
by
ShubhamTupkar
Not Answered
AD9361 - max input power - failure modes?
0
26
views
1
reply
on
Sep 22 2023
by
RR4
Not Answered
AD9361 No-Os 2r2t speed problem
0
62
views
1
reply
on
Sep 18 2023
by
Dorant
Not Answered
I Q Signal Swapping Issue in Ad9361 Received Signal
0
972
views
5
replies
on
Sep 14 2023
by
RR4
Suggested Answer
Zedboard with AD9361
0
734
views
5
replies
on
Sep 14 2023
by
RR4
Not Answered
AD9364 TX is always ON even when there is no data
0
246
views
8
replies
on
Sep 14 2023
by
RR4
Not Answered
RF loopback in fmcomms4 & Zed Board
0
44
views
1
reply
on
Sep 14 2023
by
RR4
Not Answered
Configuration for External LNA
0
1514
views
6
replies
on
Sep 14 2023
by
RR4
Not Answered
2Tx2Rx mode in AD9361
0
412
views
10
replies
on
Sep 14 2023
by
RR4
Not Answered
AD9361 configuration in 2R2T mode
0
143
views
3
replies
on
Sep 14 2023
by
RR4
Answered
AD9364 AUXDAC Pins
0
127
views
3
replies
on
Sep 13 2023
by
RR4
>