FMCOMMS5 External LO Input Level

AD9361 ext LO input needs to be -3dBm to +3dBm relative to 50ohm. Also, the ext LO frequency needs to be 2x desired operating frequency.

For platform specific external LO input level I am going to move this post to FPGA Reference Designs.

Moved to FPGA Reference Designs.

Right.  The 9361 input level is documented and understood, it's the distribution on the FMCOMMS5 that is tripping me up right now.  They're using and active CML logic splitter that according to the datasheet has ~25dB small signal gain, but there's no way (hopefully) that is true or I've probably blown my external LO inputs.

Hi Will,

Have you looked at the datasheet for the splitter to see what kind of output voltage level it allows?

Is your board still working as it should?

Charly

Yes, we have a copy of the data sheet for the Inphi 13617CF.  According to the data sheet, it takes in anywhere from 300mV to 1000mVpp (single-ended) and outputs 900mVpp to 1400mVpp (differential).  Since the outputs are being used as single-ended, I'm guessing that means max of 700mV output single ended which should be fine for the AD9361.  Also, I'm not sure what the ratio of input to output is - except the ~26dB of small signal gain spec'd.  So, my concern is that it's an ACTIVE divider meant for CML high-speed transceivers and that on that same data sheet that it specs small signal gain of approximately +26dB.  If this is really the case, then I've blown my board up - which "shouldn't" be possible at the spec'd max output.  But my confusion comes from the fact that none of these boards have the AD5355 populated, so if you want to have a multi-chip solution you have to use an external LO, but there is ZERO documentation on the expected input level on the External LO SMA input to the FMCOMMS5.

What is the expected output level setting of the AD5355 when it is populated that will prevent from blowing up the AD9361?

Someone at Analog Devices must know the answer to this.

Thanks.

Hi Will,

I'm really  ot the hardware designer of this board.

We tried to get some clarification here - this is what i got:

Please drive the SMA with 0dBm. The ADF5355 produces either +2 or -1 (can also do -4 and +5) dBm. That falls in line with the SMA level.

-Michael

Hi Michael.

We scoped the outputs of the Inphi (U307) on two of the FMCOMMS5 boards that we have modified to use a 40 MHz external reference clock and an external RX LO.  We did the board mods per what is specified on the wiki under the FMCOMMS5 Configuration Options page.  The FMCOMMS5 is being fed its J302 RX LO input from the 5355 on the board we designed.  It is also being fed its J301 ref clock input from our board.  In addition to the 180 degree phase shift in the RX channels between the two 9361s, we noticed some peculiarities in the outputs of the Inphi.

For this test we tuned the our LO to 500 MHz at 880 Vpp (+2.6 dBM).  The ref clock is 40 MHz at +7.9 dBm and we injected RF via a 1x4 power in to the FMCOMMS5's J110, J111, J210, and J211 inputs.  RF at the 9361's RX inputs was -47 dBm

We scoped C336 and C338, both on the side of the 9361.   We never observed a phase change between the outputs of the Inphi.  We did continue to observe the 180 degree phase change between the RX channels of the two 9361s. 

We also noticed the following regarding the Inphi:

• FMCOMMS5 board 1
  • displayed a 320 ps skew between DOUT1P & DOUT2P.  The Inphi spec says the skew should be 0 ps +/- 3.
  • C338 on 9361 side measured 84 mVpp (approx -17 dBm

• FMCOMMS5 board 2
  • displayed a 90 ps skew between DOUT1P & DOUT2P.   The Inphi spec says the skew should be 0 ps +/- 3.
  • C336 on 9361 side measured 432 mVpp (approx -3.3 dBm)
  • C338 on 9361 side measured 268 mVpp (approx -7.4 dBm)

I have attached some screen shots of the 500 MHz LO and scope traces.  On the scope traces, yellow is C336, blue, is C338, and green is the 500 MHz LO being fed to the Inphi.

Questions:

1. What may be causing the out-of-spec skew?
2. What may be causing the magnitude difference seen at C336 & C338?   We're speculating that this is what be causing the 180 degree shift of data between the 9361s.

Thank youi

Moved to AD9361 Design Support.

-Michael

We just ran a test where we picked several frequencies and measured the input power to the EXT LO SMA on the FMCOMMS5 board.  What we found doesn't seem to make sense, i.e. there are frequency ranges where the specified input power either under-drives or over-drives the AD9361 LO circuit - this is a small sampling as we've noticed other ranges that have the same behavior.  Does anyone have an explanation for this or has anyone see this?  We are using the AD5355 driver settings even though our AD5355 is on a custom board.  

Thanks.

I suspect that it is due to impedance variation over frequency. If you have a network analyzer take a look at the impedance.

Is there a shunt resistor at the input to define the impedance?