Hello support team,
We have implemented AD9361 custom HDL for Tx chain having indentical functionality logic as per AD9361 reference manual figure 80.Further I have added QPSK HDL and it is working as per expected, I am getting raw QPSK output as required. my QPSK symbol rate is 7.68 MSPS and I am keeping the Tx IQ rate as 30.72 MSPS. I am getting below response. 
Now, I have added RRC at the QPSK output with interpolation factor of 4. my RRC output is perfect and the 12 bit IQ data going to AD9361 custom logic is also correct. but I am not getting the correct output. my RRC is generating exact 30.72 MSPS output IQ rate. so I should get +/-5.84 MHz filtered QPSK lobe. but I am getting incorrect 30.72 MHz lobe. 
Here, I am seeking you support that raw QPSK is working accurate with AD9361 but adding RRC is not working peroperly. I have validated my QPSK +RRC which is working 100% correct and the data (IQ) I am sending to AD9361 is also correct. below is the FFT generated from 12 bit IQ data which is further going to AD9361 HDL. that means, my AD9361 is getting correct input. 
If you need any further information related to AD9361 custom logic for review , please let me know.
