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AD9361 Recommended for New Designs
The AD9361 is a high performance, highly integrated radio frequency (RF) Agile Transceiverâ„¢ designed for use in 3G and 4G base station applications....
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AD9361 on Analog.com

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What is the maximum supported sample rate when using ZCU102 with FMCOMMS5?

		
	
				

			

									
					    sasikumar
					
							

            
            			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Mar 4, 2026 
				
			
			
		
    
		
		                    	    
    
        	    
    Thread Summary
    
                The user experiences a reduction in RX waveform quality from 56 MSPS to 48 MSPS after enabling synchronization on the ZCU102 with FMCOMMS5. The final answer suggests checking AD9361 initialization calibration results, BBPLL and RFPLL locks, digital interface timing, and BBDC/FADC tracking enable. Using an external LO for both AD9361 devices can improve performance by eliminating LO phase uncertainty.
                        	    
    
                
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    Category: Hardware
    
    		        		            		    
    Product Number:  AD9361  
    
    		        		    		    
    
		    		    
		    			
    
			    
    Hello Team,
    

    We are using ZCU102 with FMCOMMS5.
    Without triggering synchronization, we are able to achieve proper waveforms at RXs around 56 MSPS. However, after triggering synchronization between both chips, the waveform appears properly only up to 48 MSPS.
    

    Is there any limitation when using synchronization with FMCOMMS5, or are we missing any configuration?
    

     
    
			
    
			
									
		                             
                        

    
    
                                            
                 hardware
                
                                                    
                 ad9361
                
                                                    
                 software defined radio
                
                                                    
                 Wideband Transceiver IC
                
                                                    
                 rf and microwave
                
                                        
                                            
                
                
                                
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      •  Analog Employees  
      
            
						
                            
            
            				
            
                on Mar 5, 2026 3:32 AM
            
            
						
			            		
      
		
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      HI  

      

      This could be timing-margin issue between two devices. This is dependent on the input clock provided to FMCOMMS5 board. 

      

      Please check on AD9361 init calibration results, check on BBPLL lock, RFPLL lock, Digital interface timing, BBDC/FADC tracking enable. Also check with disabling tracking calibrations for some time if it works for higher data rates also.
      

      Pls try with External LO for both Ad9361 devices. This eliminates LO phase uncertainity and improves MCS performance.
      

      

      Regards,
      

      SJ
      
			
      

		
			
	      

		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
						
				
						
				
				
		
		
      
			
		
      
	
      

      

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