AD9361
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The AD9361 is a high performance, highly integrated radio
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AD9361 on Analog.com
Hello, in the context of using an external LO (a signal generator in my case) with an fmcomms5, I am facing an issue related to the input power specification of the Inphi 13617CF (13 Gbps 1:2 Fanout).
According to the datasheet, the maximum input level driving the 13617CF is specified as 1 Vpp (≈ 4 dBm).
At 500 MHz, this condition is met and the signal is successfully generated at the output. However, as the frequency increases, the input power required to properly observe the signal at the output exceeds 4 dBm. For example, at 700 MHz, approximately 8 dBm is required.
Since my target operating frequency is on the order of 2 GHz, 8 dBm does not appear to be sufficient to faithfully reproduce the desired signal at the output. I am therefore hesitant to further increase the input power beyond the datasheet recommendation, but at the same time I am wondering whether this behavior could be explained by frequency-dependent losses or impedance mismatch, and whether increasing the input power beyond 8 dBm would be acceptable in practice in order to recover the expected signal at higher frequencies.
Could you please advise on whether this behavior is expected and how it should be handled?
Best
Hi Hamima
Thanks for your query. Pls confirm whether your query is with respect to AD9361 external LO input spec? This is already available in the datasheet.
if the query is related to clock buffer chip Inphi 13617CF, we will not be able to answer it.
Regards,
SJ
Hi SJagini,
Thank you for your reply.
To clarify, the issue I am observing is linked to the Inphi 13617CF fanout buffer, which distributes its two outputs to the two AD9361 chips in order to obtain coherent LO signals at the transmitters.
I’ve noticed that AD has since replaced this buffer with the HMC744LC3, and I understand this may be because it is an ADI component with guaranteed behavior on the fmcomms5 platform.
In this context I have two questions:
Have you encountered the same type of behavior with the HMC744LC3 fanout buffer, in particular a frequency-dependent increase in the required input power to observe the expected output?
In a similar discussion regarding the fmcomms5 external LO input level (linked below), a suggestion was made to place an 80 Ω shunt resistor to address mismatch issues.
Do you think this approach is appropriate or effective to improve matching and reduce the power requirement ? Could this behavior instead be related to board-level impedance matching rather than the fanout component itself, given that the fanout device is specified as broadband matched?
https://ez.analog.com/rf/wide-band-rf-transceivers/design-support/f/q-a/80553/fmcomms5-external-lo-input-level/
Best,