Hello,
I am trying to loopback the AD9361 transceiver via BIST feature. The input Tx port is fed by random data for testing purposes and not from BIST generator, and then route the data to Rx port before going to Tx chain, so I set the 0x3f4 0x01 to activate BIST and 0x3f5 to 0x01 in order to do so. However the received data are mismatch like depicted in this figure
All data were captured using internal logic analyzer (ILA). After reading the AD9361 reference manual, the 4 lower bits of 16-bit input data are truncated for DAC, and 4 upper bits are set depend on the 11th bit, so in my case when I send 0x8000, the received data at the Rx port should be 0x800 but instead it gave me 0x81f for I channel and 0x7e0 instead of 0x7ff for Q channel. In my design, the WNS is about -1.712 ns while the TNS is -196.903 ns but do they affect the received data from Tx port? And what caused the received data different from what they should? Thank you in advance.
revised for I and Q channel
[edited by: dws79 at 10:41 AM (GMT -4) on 15 Aug 2024]