Hello everyone,
We are encountering a critical issue with the AD9361 transceiver in our custom board setup. We are currently developing an RF-DEA (Dielectric Spectroscopy) application utilizing the AD9361 transceiver alongside a Zynq UltraScale MPSoc xczu3eg running Petalinux 2021.2.
The problem we are facing is an exceptionally high LO switching time of approximately 1.6 seconds, significantly longer than the typical 45 milliseconds when recalibration happens. This issue affects either one or both of the AD9361 transceivers installed on each board. We have produced 12 prototypes so far, with 7 of them exhibiting this issue on at least one transceiver.
The issue occurs during frequency sweeping operations within the range of 180 MHz ± 100 MHz. For example, when sweeping from 80 MHz to 500 MHz with a step of 10 MHz via setting the LO frequency for each step. When starting the sweep with a frequency higher than 180 MHz, the issue is not reproducable. Upon analyzing the SPI communication logs, we observed that the driver appears to be waiting for the transceiver to complete the 'Tx Quad Cal' process when the issue occurs, which is not the case otherwise. Unfortunately, utilizing fast lock to overcome the calibration issue is not an option for us, since we have to deal with a relatively rapdily changing temperature environment.
Despite our efforts, we have been unable to pinpoint the root cause of this behavior. It is concerning that the issue consistently occurs at the same frequency range during our testing.
Any insights, recommendations, or guidance is appreciated.
Attached are relevant documentation, including SPI communication logs and relevant code excerpt.
spi-log-human-readable.txtspi-log.csv.txt
streamConfig _txConfig = { .bandwidthHz = MHZ(0.200), .samplingRateHz = sampleRate, .loFrequencyHz = localOscillatorFrequency, .rfPortName = "A", .gains = {gains.tx1Db, gains.tx2Db}, .gainControlMode = "manual", }; void initTransmitPath(streamConfig& config, int id) { bool cyclic = true; PLOGI << "Acquiring AD9361 TX streaming devices"; getAD9361StreamingDevice(_ctx, TX, &_tx, id); PLOGI << "Configuring AD9361 TX for streaming"; configureAD9361StreamingChannel(_ctx, &config, TX, 0, id); PLOGI << "Initializing AD9361 IIO streaming channels"; getAD9361StreamingChannel(_ctx, TX, _tx, 0, &_tx0_i); getAD9361StreamingChannel(_ctx, TX, _tx, 1, &_tx0_q); iio_channel_enable(_tx0_i); iio_channel_enable(_tx0_q); _txbuf = iio_device_create_buffer(_tx, _bufferSize, cyclic); if (!_txbuf) { PLOGE << "Could not create TX buffer: " << strerror(errno); processStop(); } } void setLoFrequency(enum iodev direction, int64_t f) { struct iio_channel *chn = NULL; getLOChannel(_ctx, direction, &chn, _id); writeLLIntValToChannel(chn, "frequency", f); }