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EVM Performance with AD9361 Transmitter at Different Frequencies

Category: Datasheet/Specs
Product Number: ad9361

Hello EZ community,

We are using the AD9361 on a custom board, No Os.

During transmission at 2.3GHz, we observed an Error Vector Magnitude (EVM) of 1.48%.

However, upon transmitting at 4.4GHz, the EVM increases to 2.2% and above.

Of greater significance is the observation that the cluster of symbols becomes smeared. (see attached picture of I and Q)

The measurements were taken directly after the balun.

Is this behavior considered normal? Additionally, what steps can we take to improve it?

Thank you in advance.

  • Can you check the clock source? The frequency error suggests a frequency /drift in the clock source. Are you using a crystal for providing the ref_clk? Can you provide the clock from a signal generator? Can you try with default 40MHz REF_CLK? Also, hope the sig-gen which is providing the ref_clock and the spectrum analyzer used to evm measurements are synced to each other.

  • For reference clock, we are using TCXO 40MHz, ±2.0ppm

  • We tried to connect the signal generator as reference clock 40Mhz but the EVM become 6-7% and the IQ become more smeared.

    What does it mean sig-gen and spectrum synced to each other? can you explain please?


  • If you are using siggen,then the external 10MHz clock output/input of the siggen should be connected to the external 10MHz input/output of the Spectrum analyzer, to sync both of them.

    Also, ensure that the TX and the RX LO frequencies are set at some offset from each other.

  • As per my experience, the smearing of the constellation indicates worse phase noise (the constellation points smearing is a typical indicator of poor phase noise performances); the higher EVM is a normal effect of more large constellation points. More probably you've observed higher EVM when using an external signal generator as a reference because, typically, the synthesized signal generator's phase noise is worse than a fixed clock oscillator or quartz. An increase of phase noise proportionally with LO frequency is normal then, the EVM is worse at high frequencies. As per the datasheet, the EVM should still be lower than you've measured; be sure that you do not have a tx level that causes a bit of signal compression; my experience with AD9361 suggests that using 10dB (or higher) TX attenuation ensures that you're complete out of any saturation). Using less than 10dB of TX attenuation causes a small signal saturation (this value strictly depends on modulation type: PAPR

  • Hi,
    We attempted to synchronize between the signal generator and the spectrum analyzer, but encountered consistent results (significantly worse than with TCXO). We tried adjusting the TX attenuation settings without observing any noticeable impact.
    On our custom board, the TCXO is connected as an external reference clock to the XTALN pin (image attached). However, we noticed that the "xo_disable_use_ext_refclk_enable" parameter was initially set to 0, so we modified it to 1.
    Furthermore, we verified the clock signal using an oscilloscope and discovered that the clock is not AC-coupled on the XTALN pin. Upon disconnecting the capacitor, we observed a DC signal on the XTALN pin.

    This raised several questions:
    a) Why does modifying the "xo_disable_use_ext_refclk_enable" parameter not have any effect?
    b) Is it expected behavior for the clock signal to float on DC on the XTALN pin?
    c) What is the recommended value for the capacitor on XTALN?

    Thank you in advance

  • The level for the clock should be 1.3 V p-p maximum(lower swings will limit performance). This signal can be a clipped sine wave or a CMOS signal. The best performance will be seen with the highest slew rate possible.
    The XTALN (Pin M12) has an input resistance of ~ 10 kΩ in parallel with 10 pF.

  • Thank you for your response. However, we have already reviewed the information provided in the datasheet, and unfortunately, it does not address the specific question I raised in my previous message.

  • We will check and get back on this

  • Are you able to reduce the EVM error? There is a considerable amount of frequency shift in your EVM plots. The frequency error is 6KHz. Can you shift the frequency by 6KHz in your analyzer and then demodulate, you will see improvement in EVM.

    Also, EVM can get impacted because of the internal phase noise of the LO. You can use external LO and check the performance. Note that for ext LO, you should provide  double of the required frequency.

    Regarding the DC on the signal, you need to check from the TCXO manufacturer. The AC coupling capacitor will block the DC from going to the XTALN input.