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The AD9361 is a high performance, highly integrated radio frequency (RF) Agile Transceiverâ„¢ designed for use in 3G and 4G base station applications....
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Tx FIR filter set-up wrt predistortion



		

			

									
					    RobM850
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Feb 23, 2024 
				
			
			
		
    

				
		
    
		    		    
		    
		    		      		            		        
    Category: Hardware
    
    		        		            		    
    Product Number:  AD9361 
    
    		        		    		    	
			
    We want to use the 128 tap Tx channel FIR filter for pre-distortion to compensate for PA distortion but the Analog MatLab tool does not seem to allow us to do that.  Is this a limitation of the MatLab tool or a limitation of the FIR filter in the AD9361?
    

    For now we just need to confirm whether or not this FIR filter can do the job we need it to, tuning it is another problem we will tackle later.
    

    Thanks
    

    Rob
    
									
			        
		
    

				
						
        

    
    Tags: 
                                            
                 hardware
                
                                                    
                 Linearisation
                
                                                    
                 ad9361
                
                                                    
                 Predistortion
                
                                                    
                 Wideband Transceiver IC
                
                                        
                                            
                
                
                                        
                                            
                
                
                                
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      The FIR filter supports  a maximum of 128 taps, but the FIR taps are calculated based on the input sampling rate, which is a limitation to the number of taps that can get selected.
      

      from UG:
      

      The Tx FIR calculates 16 taps per clock cycle. This limits the number of available taps to the ratio of DAC_CLK to the input data rate multiplied by 16. For example, with an input data rate of 25 MHz and DAC_CLK equal to 100 MHz, the ratio of the DAC_CLK to the input data rate is 100/25 or 4. In this scenario, the total number of taps available is 64.
      Another limitation is the memory inside of the filter. The total number of operations that can be performed is limited to 64 per clock cycle. This means that the number of taps available is limited to 64 with an interpolation factor set to 1. If an interpolation rate greater than 1 is used, the memory space can be used to include more taps.
      

        
      
			
      

		
			
	      

		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
						
				
						
				
				
		
		
      
			
		
      
	
      

      

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													0
							
			
				
									
							        
			
			
			
      •  Analog Employees  
      
            
			                            
                                                                                                                        
            
				
			
            
					
      
	
      

		
		
      
					
      The FIR filter supports  a maximum of 128 taps, but the FIR taps are calculated based on the input sampling rate, which is a limitation to the number of taps that can get selected.
      

      from UG:
      

      The Tx FIR calculates 16 taps per clock cycle. This limits the number of available taps to the ratio of DAC_CLK to the input data rate multiplied by 16. For example, with an input data rate of 25 MHz and DAC_CLK equal to 100 MHz, the ratio of the DAC_CLK to the input data rate is 100/25 or 4. In this scenario, the total number of taps available is 64.
      Another limitation is the memory inside of the filter. The total number of operations that can be performed is limited to 64 per clock cycle. This means that the number of taps available is limited to 64 with an interpolation factor set to 1. If an interpolation rate greater than 1 is used, the memory space can be used to include more taps.
      

        
      
			
      

		
			
	      

		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
						
				
						
				
				
		
		
      
			
		
      
	
      

      

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