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[AD9364] Tx glitches/intermodulation

Category: Hardware
Product Number: ad9364

Hello,

I am watching the signal out of one of the ad9364's Tx interfaces, both while generating a sine wave.

Everything is done using OS-flow.

The sine wave is 35 kHz, with 1362.5 MHz carrier frequency. The out_voltage_rf_bandwidth is 200 kHz, the ENSM mode is FDD and the out_voltage0_RX_LO_frequency is 70 MHz while transmitting.

My problem is that there is some kind of high noise around the Tx signal. The relevant signal is -5 dBm while the adjacent peaks are -45 dBm. Is that within expected performance? Please see image below (vertical are dBm, and horizontal are MHz):

Also, if I increase the sine's frequency, I can see a signal at 1362.5 MHz (which is TX LO) and the signal at TX LO + sine's frequency. Why is the TX LO present?

Thank you for your help.

  • Also, if I increase the sine's frequency, I can see a signal at 1362.5 MHz (which is TX LO) and the signal at TX LO + sine's frequency. Why is the TX LO present?

    LO leakage will be there because of the direct conversion type architecture and as per datasheet specs, its levels are -50dBc with respect to the tone.

    My problem is that there is some kind of high noise around the Tx signal

    Can you check the overflow reg 0x05E and 0x05F? If there is a overflow, try reducing the basbeband scaling and then check the output.

  • Thank you for pointing out the LO leakage level.

    For the second point, I found the registers in the documentation, but I am not sure how I can access them from Linux. Is there any info on how to do this?

    And what do you mean by baseband scaling? Interpolation?

  • For the second point, I found the registers in the documentation, but I am not sure how I can access them from Linux. Is there any info on how to do this?

    you can do this in debug mode to read and write register access.

    As for baseband scaling, reduce the DAC level and check the output.