AD9361
Recommended for New Designs
The AD9361 is a high performance, highly integrated radio
frequency (RF) Agile Transceiverâ„¢ designed for use in 3G and
4G base station applications....
Datasheet
AD9361 on Analog.com
Hi,
I am trying to implement frequency hopping in AD9361. I need to support 64 frequency spots.
I am exploring fast lock save and fast lock load options.
The fast lock save command returns 17 register values to be stored in DDR memory, to be loaded to AD9361 at a later point.
My question is, while saving the 17 register values for the spots to be supported, it comes along with the profile number.
Is it possible to save data for one profile say profile 0, and change the profile number for the same 17 values for later usage?
For example, I have spot frequencies 450MHz to 513MHz in 1MHz steps, which comes to 64 spots.
Can I save the calibration data(17 values) for profile 0 only for all spots during initialization and while loading,
can I use the same calibration data to load to some other profile number..say profile 1?
Thanks
Can I save the calibration data(17 values) for profile 0 only for all spots during initialization and while loading,
can I use the same calibration data to load to some other profile number..say profile 1?
The profile number that is assigned for a particular LO frequency, generates a set of callibration data values corresponding to that particular profile number. Same data you need to use for loading to the same profile number.
Refer to the below link for storing and saving more than 8 fast lock profiles:
Hi,
Thank you for your response. I had made the necessary changes regarding the Fast lock Load and Fast lock recall method, and I am able to achieve more than 8 spot frequencies.
But the time taken by fast lock load operation is more and it is causing timing issues for other operations. Is there a way to optimize the Fast lock Load operation?
Any Help on this will be greatly appreciated.
Thanks
You can use the Fast lock pin control mode to switch between profiles instead of using the SPI mode. In pin control mode, you can get rid of the extra time caused because of the spi read /write operation.
From UG:
This mode is enabled by setting Bit D1, Fast Lock Profile Pin Select in Rx Register 0x25A and/or Tx Register 0x29A along with enabling fast lock mode in the same registers. When this is set, CTRL_IN1 through CTRL_IN3 select the profile (if both pin select bits are set, profiles are selected in parallel). In the system design, it should be noted that CTRL_IN pins are configurable for other functions as well so they are not available for other functions simultaneously. Rev.
Below is the shell script for doing that: