I am using the AD9361 in FDD Independent Control mode and need to verify the state of the RX and TX LO's after they have been either enabled or disabled via the Enable and TXNRX signals. I tried configuring the REG_RX_LOCK_DETECT_CONFIG (0x24A) and REG_TX_LOCK_DETECT_CONFIG (0x28A) for continuous detection and then reading the REG_RX_CP_OVERRANGE_VCO_LOCK (0x247) and REG_TX_CP_OVERRANGE_VCO_LOCK (0x287) registers, however, the results always indicate the PLLs are locked. I also observed the TX LO leakage only appears when TXNRX is asserted. Below are some other observations:
Note: The current shown is the overall system current.
| Description | RX_PROFILE | TX_PROFILE | Observation | |
| Both RX and TX LO’s off | 0 | 0 | Power Supply: 4.2VDC 840mA (No TX LO leakage present) | |
| RX LO Off, TX LO On | 0 | 1 | Power Supply: 4.2VDC 948mA (TX LO leakage present) | |
| RX LO On, TX LO Off | 1 | 0 | Power Supply: 4.2VDC 906mA (No TX LO leakage present) | |
| Both RX and TX LO’s On | 1 | 1 | Power Supply: 4.2VDC 1016mA (TX LO leakage present) |
Fixed more typos.
[edited by: jsusong at 9:31 PM (GMT 0) on 4 Mar 2019]
