Support AD9361/AD9363/AD9364

Q&A

by ClutchGod Support AD9361/AD9363/AD9364

Started 2 days ago

13 0 0

Not Answered
AD9361 + custom Zynq-7000 (XC7Z100) carrier — RX LVDS tune all-hash matrix on Linux, works on No-OS 0
Not Answered

Hardware: Custom carrier with Zynq-7000 XC7Z100-2FFG900I + AD9361 on FMC-HPC0 Software stack: PetaLinux 2019.1, ADI Linux fork (adi-4.19.0), HDL hdl_2019_r1 PCORE_VERSION: 10.01.b Sample rate: 61.44 MHz (LVDS DDR) Symptom (Linux): ad9361 spi0.0: ad9361_probe...

hardware ad9361 software defined radio rf and microwave

13 0 0
by sasi20 Support AD9361/AD9363/AD9364

Started 6 days ago

55 0 0

Not Answered
How to Transfer AD9361 RF DMA Data to/from PL-DDR in FMCOMMS5-Based Design 0
Not Answered

Hi ADI Team, I am using the FMCOMMS5 reference design. In the reference design, the ADC DMA and DAC DMA are mapped to PS-DDR. My requirement is to communicate RF DMA data with PL-DDR instead of PS-DDR. Could you please provide guidance on the following...

hardware ad9361 software defined radio rf and microwave

55 0 0
by colinsmith Support AD9361/AD9363/AD9364

Latest 6 days ago by colinsmith

100 2 0

Not Answered
Power Draw 0
Not Answered

I'm looking for the maximum and minimum power draws for the ADRV9361-Z7035. Ideally the max power draw would be measured with peak Tx output with the arm cores running and the minimum output be measured from a sleep or idle state of some sort.

adrv9361-z7035 Datasheet/Specs

100 2 0
by Kaman Support AD9361/AD9363/AD9364

Latest 8 days ago by Kaman

103 2 0

Not Answered
Interfacing RF Transceiver with DAC and ADC of NXP's LA9310 0
Not Answered

Hello Analog device team, I am building one hardware where i want to interface LA9310 with AD9361. The problem is AD9361 supports only Digital data. So is there any way where i can interface dac and adc of la9310 with any analog devices rf transceiver...

adc hardware ad9361 software defined radio ad9363 rf and microwave rf dac Show More

103 2 0
by Maitry Support AD9361/AD9363/AD9364

Latest 17 days ago by Maitry

225 3 0

Not Answered
Regarding AD9361 integration with custom DSP of QPSK + RRC 0
Not Answered

Hello support team, We have implemented AD9361 custom HDL for Tx chain having indentical functionality logic as per AD9361 reference manual figure 80.Further I have added QPSK HDL and it is working as per expected, I am getting raw QPSK output as required...

integration AD9361 custom HDL dsp software ad9361 qpsk+rrc software defined radio fft spectrum vivado 2019.1 rf and microwave Show More

225 3 0
by SchoolofInformation Support AD9361/AD9363/AD9364

Latest 18 days ago by SchoolofInformation

135 2 0

Not Answered
how to deal with DC offset in ad9361 of plutosdr 0
Not Answered

I made a new firmware for plutosdr and it is act good. In the final step, there is a 4QAM judgement for rx signal, it is clear that the step did a right work form this graph, but I think a DC offset is separating my IQ wave. I am not sure what happen...

hardware plutosdr ad9361 software defined radio rf and microwave Show More

135 2 0
by FrankC Support AD9361/AD9363/AD9364

Latest 18 days ago by SJagini
95 1 0
Not Answered
Is it possible to operate in 1R1T mode with RX2A and TX2B using the No OS Drivers? 0
Not Answered

Hi! We are running into issues trying to select RX2A and TX2B to operate in 1R1T mode. It seems the AD9361 defaults to operate in MIMO mode when we configure it to select RX2A and TX2B. Currently, our design uses the latest no OS drivers. Is 1R1T not...

hardware ad9361 transmit ad9361 receive ad9361 software defined radio ad9361 configuration ad9361 driver rf and microwave Show More

95 1 0
by primozbeltram Support AD9361/AD9363/AD9364

Latest 20 days ago by Stanca
609 5 0
Answered
AD9361 BIST IQ data mask confusion 0
Answered

I would like to clear this issue that I have with AD9361 and BIST IQ masking. In picture AD9361_ip_connect_block_diagram.png is block diagram with AD9361 IP core IQ data port adc_data_i0/adc_data_i1 and adc_data_q0/adc_data_q1 connections. In picture...

hardware ad9361 ad-fmcomms3 Wideband Transceiver IC RF Integrated Transceivers Show More

609 5 0
by Gok Support AD9361/AD9363/AD9364

Latest 24 days ago by SJagini
137 1 3
Not Answered
AD9364 Clocking 0
Not Answered

Hi, I am using the AD9548 to generate the clock for the AD9364 on my board. Can I feed an AC-coupled LVDS or LVPECL output from the AD9548 directly into the XTALP and XTALN pins of the AD9364? The AD9364 datasheet does not explicitly mention support...

adc Datasheet/Specs D/A Converters (DAC) clocking software defined radio clock RFAGILETRANSCEIVER RFTRANSCEIVER rf and microwave ad9364 dac Show More

137 1 3
by TimeVary Support AD9361/AD9363/AD9364

Latest 24 days ago by SJagini
106 1 0
Not Answered
AD9361 external LNA control 0
Not Answered

Hi Guys, I encountered a issue while debugging AD9361, the issue is described below： I design the LNA and Atten before the AD9361 RF front at the receiver path . I want to control external LNA gain,but the external LNA have the two mode:1.normal,2...

hardware ad9361 software defined radio rf and microwave

106 1 0
by sergiomonjo Support AD9361/AD9363/AD9364

Latest 24 days ago by SJagini
97 1 0
Not Answered
Question about RF TX REVERSE POWER in TX PORTS 0
Not Answered

While developing the AD9361, we encountered a scenario where we need your expertise. We plan to connect the AD9361's Tx port directly to a patch antenna. In this case, some external signals might return to the AD9361's Tx port through the antenna...

hardware ad9361 software defined radio rf and microwave

97 1 0
by Mayemp Support AD9361/AD9363/AD9364

Latest 26 days ago by SJagini
175 3 0
Not Answered
BER test with AD9361 + FMCOMMS4 Zed board. 0
Not Answered

Hi, I am trying to measure the BER of my Loopback setup. I am transmitting and receiving a QPSK modulated signal with the help of GNU radio, I have attached the image of my flowgraph for your reference. My question is I get normal BER vs SNR trend...

hardware software defined radio rf and microwave

175 3 0
by zachi Support AD9361/AD9363/AD9364

Latest 26 days ago by SJagini
126 1 0
Not Answered
When transmitting at both TX1 and TX2 , the power of both of them decrease by 20db. 0
Not Answered

When transmitting at both TX1 and TX2 , the power of both of them decrease by 20db. what is the reason ?

hardware ad9361 software defined radio Wideband Transceiver IC rf and microwave Show More

126 1 0
by HPBhat2149 Support AD9361/AD9363/AD9364

Latest 26 days ago by SJagini
139 1 0
Not Answered
Data integrity issue in Digital loopback mode for AD9361 in LVDS mode 0
Not Answered

Hello, We are bringing up a custom FPGA+ AD9361 card. As part of bring up we defined the test case to verify the LVDS interface between FPGA & AD9361. AD9361 configured with 2R2T, LVDS, Full duplex & FDD mode. We are checking channel 1 TX & channel...

hardware digital loopback ad9361 software defined radio ad9361 configuration rf and microwave Show More

139 1 0
by kalainan Support AD9361/AD9363/AD9364

Latest 1 month ago by SJagini
243 3 0
Not Answered
AD9364 Custom Board vs EVM (ADRV9364-Z7020) — Same API/Clock/QPSK MOD & DE-MOD, but Different Output and Calibration Registers 0
Not Answered

Hi ADI Team, We are debugging a custom AD9364 hardware platform and would like guidance on why our custom board behaves differently from the EVM despite using the same intended configuration. We are comparing two AD9364-based platforms: (1) an ADRV9364...

hardware software defined radio rf and microwave ad9364

243 3 0

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Q&A

Not Answered
AD9361 + custom Zynq-7000 (XC7Z100) carrier — RX LVDS tune all-hash matrix on Linux, works on No-OS 0
Not Answered

Not Answered
How to Transfer AD9361 RF DMA Data to/from PL-DDR in FMCOMMS5-Based Design 0
Not Answered

Not Answered
Power Draw 0
Not Answered

Not Answered
Interfacing RF Transceiver with DAC and ADC of NXP's LA9310 0
Not Answered

Not Answered
Regarding AD9361 integration with custom DSP of QPSK + RRC 0
Not Answered

Not Answered
how to deal with DC offset in ad9361 of plutosdr 0
Not Answered

Not Answered
Is it possible to operate in 1R1T mode with RX2A and TX2B using the No OS Drivers? 0
Not Answered

Answered
AD9361 BIST IQ data mask confusion 0
Answered

Not Answered
AD9364 Clocking 0
Not Answered

Not Answered
AD9361 external LNA control 0
Not Answered

Not Answered
Question about RF TX REVERSE POWER in TX PORTS 0
Not Answered

Not Answered
BER test with AD9361 + FMCOMMS4 Zed board. 0
Not Answered

Not Answered
When transmitting at both TX1 and TX2 , the power of both of them decrease by 20db. 0
Not Answered

Not Answered
Data integrity issue in Digital loopback mode for AD9361 in LVDS mode 0
Not Answered

Not Answered
AD9364 Custom Board vs EVM (ADRV9364-Z7020) — Same API/Clock/QPSK MOD & DE-MOD, but Different Output and Calibration Registers 0
Not Answered

Q&A

Not Answered AD9361 + custom Zynq-7000 (XC7Z100) carrier — RX LVDS tune all-hash matrix on Linux, works on No-OS 0 Not Answered

Not Answered How to Transfer AD9361 RF DMA Data to/from PL-DDR in FMCOMMS5-Based Design 0 Not Answered

Not Answered Power Draw 0 Not Answered

Not Answered Interfacing RF Transceiver with DAC and ADC of NXP's LA9310 0 Not Answered

Not Answered Regarding AD9361 integration with custom DSP of QPSK + RRC 0 Not Answered

Not Answered how to deal with DC offset in ad9361 of plutosdr 0 Not Answered

Not Answered Is it possible to operate in 1R1T mode with RX2A and TX2B using the No OS Drivers? 0 Not Answered

Answered AD9361 BIST IQ data mask confusion 0 Answered

Not Answered AD9364 Clocking 0 Not Answered

Not Answered AD9361 external LNA control 0 Not Answered

Not Answered Question about RF TX REVERSE POWER in TX PORTS 0 Not Answered

Not Answered BER test with AD9361 + FMCOMMS4 Zed board. 0 Not Answered

Not Answered When transmitting at both TX1 and TX2 , the power of both of them decrease by 20db. 0 Not Answered

Not Answered Data integrity issue in Digital loopback mode for AD9361 in LVDS mode 0 Not Answered

Not Answered AD9364 Custom Board vs EVM (ADRV9364-Z7020) — Same API/Clock/QPSK MOD & DE-MOD, but Different Output and Calibration Registers 0 Not Answered

Not Answered
AD9361 + custom Zynq-7000 (XC7Z100) carrier — RX LVDS tune all-hash matrix on Linux, works on No-OS 0
Not Answered

Not Answered
How to Transfer AD9361 RF DMA Data to/from PL-DDR in FMCOMMS5-Based Design 0
Not Answered

Not Answered
Power Draw 0
Not Answered

Not Answered
Interfacing RF Transceiver with DAC and ADC of NXP's LA9310 0
Not Answered

Not Answered
Regarding AD9361 integration with custom DSP of QPSK + RRC 0
Not Answered

Not Answered
how to deal with DC offset in ad9361 of plutosdr 0
Not Answered

Not Answered
Is it possible to operate in 1R1T mode with RX2A and TX2B using the No OS Drivers? 0
Not Answered

Answered
AD9361 BIST IQ data mask confusion 0
Answered

Not Answered
AD9364 Clocking 0
Not Answered

Not Answered
AD9361 external LNA control 0
Not Answered

Not Answered
Question about RF TX REVERSE POWER in TX PORTS 0
Not Answered

Not Answered
BER test with AD9361 + FMCOMMS4 Zed board. 0
Not Answered

Not Answered
When transmitting at both TX1 and TX2 , the power of both of them decrease by 20db. 0
Not Answered

Not Answered
Data integrity issue in Digital loopback mode for AD9361 in LVDS mode 0
Not Answered

Not Answered
AD9364 Custom Board vs EVM (ADRV9364-Z7020) — Same API/Clock/QPSK MOD & DE-MOD, but Different Output and Calibration Registers 0
Not Answered