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How to configure only the ARM without programming the bitstream in the adrv9029 no-os 2025.1 Vitis project?

Thread Summary

The user wants to configure the ARM in the ADRV9029 no-OS 2025.1 Vitis project without reprogramming the bitstream. The solution is to use Vitis and uncheck the 'Program FPGA' option in debug configurations, or use XSCT to initialize the ARM and load the application after programming the bitstream from Vivado Hardware Manager.
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Category: Software
Product Number: adrv9026
Software Version: vitis2025.1

How to configure only the ARM without programming the bitstream in the adrv9029 no-os 2025.1 Vitis project?I want to program the bitstream through Vivado and observe the internal signals of the FPGA using ILA.

Thread Notes

  • Hi JTHY,

    As far as I understand, the issue is that make run always re-programs the bitstream, which is overwriting the one you loaded from Vivado.

    There might be two possible solutions for this:

    The simpler one would be to use Vitis directly instead of make run. In the debug configurations there is an option to uncheck "Program FPGA", which allows you to run the application as many times as you want without re-programming the bitstream.

    For the other one, you could bypass make run and use XSCT to initialize the ARM and load your application after programming the bitstream from Vivado Hardware Manager. The files you need should already be in your build folder from the first make run.

    Hope this helps for now, someone with more expertise will follow up soon.

    Kind regards

  • Hi JTHY,

    I wanted to follow up on this thread. Do you have any updates on your end? If there's nothing further needed, I'll go ahead and close this thread.

    Please let me know either way.

    Thanks, Tudor