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Signal Processing with ADRV9026 on Linux Without GUI

Category: Hardware

Dear Analog Devices Support Team,

I am working with the ADRV9026 SDR transceiver on the ADS9-V2EBZ motherboard, which includes an Avnet MicroZed board with a Zynq FPGA, running Linux, and a Kintex Ultrascale FPGA. I am exploring the signal processing capabilities with Linux, but without using a GUI.

My question is as follows:

1. With Linux in place, do I need to access and modify the FPGA code for signal processing tasks, or can these tasks be handled entirely by the Linux system and the available APIs?

2. How can signal processing be performed in a Linux environment without a GUI, using the existing tools and APIs?

Any advice on using Linux for signal processing with the ADRV9026, and how to work without a GUI, would be greatly appreciated.

Thank you for your support.

Best regards,  

talebinezhad 



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[edited by: AliTalebi at 5:44 PM (GMT -5) on 4 Dec 2024]

Thread Notes

  • ADRV9026 on ADS9 does not use our standard Linux drivers, and uses the API directly for evaluation.   does that system support any embedded development?

    -Travis

  • Dear Travis,

    Thank you for your response. I have a couple of additional questions regarding the use of the ADRV9026 on the ADS9-V2EBZ motherboard:

    1. For signal processing, which FPGA should I load the code onto – the Zynq FPGA on the MicroZed board or the Kintex Ultrascale FPGA on the motherboard itself?

    2. How can I use the APIs for configuring the transceiver in a non-Linux environment? What is the recommended approach for interacting with the APIs without relying on Linux?

    Your guidance on these points would be very helpful.

    Best regards,
    Ali Talebi

  • Hi  , ASD9 support and managed through   and others. However, I dont believe any development on the embedded system is supported. But he or others need to comment.

    -Travis

  • For signal processing, which FPGA should I load the code onto – the Zynq FPGA on the MicroZed board or the Kintex Ultrascale FPGA on the motherboard itself?

    Its the Kintex Ultrascale FPGA that we use or JESD signal transfer and signal processing.

    How can I use the APIs for configuring the transceiver in a non-Linux environment? What is the recommended approach for interacting with the APIs without relying on Linux?

    https://github.com/analogdevicesinc/no-OS/tree/main/projects/adrv902x

    Please check Software integration section of the User guide.

    Could you please share your project details, what are you trying to come up with?

  • Thank you for your previous responses.

    My goal is to measure the time interval between multiple Gaussian pulses after receiving them. Specifically, I want to process these pulses in an embedded environment. For example, one of my tasks is to receive multiple Gaussian pulses, measure the time interval between them, and count the number of pulses received.

    I would like to clarify the following points:

    1. If I write my code on the Kintex Ultrascale FPGA, since it does not have an ARM core, I understand that I won’t be able to execute APIs for communication.

    2. On the other hand, if I write my code on the Avnet Zynq FPGA, I know that it doesn’t have a JESD204B connection to the FMC interface, so it wouldn’t be possible to send data directly through this FPGA.

    Given these limitations, I would like to know the best approach for my project: should I write the code for the Kintex FPGA or the Zynq FPGA? And how can I manage the communication and data transfer in an embedded environment where I won’t be relying on a PC?

    I would greatly appreciate it if you could provide more detailed guidance on how to handle the data transfer, signal generation, and processing in this embedded setup, as the documentation provides general information, but the exact implementation steps are unclear.

    Thank you

  • The MicroZed board is the embedded Linux system on which the ADRV902X Command Server will execute. The ultrascale design connects to the MicroZed through the AXI Bridge.  The  Ultrascale FPGA interfaces to the ADRV902X evaluation board through a FPGA Mezzanine (FMC) connector. 

    The MicroZed connects to a PC through a TCP/IP connection between the command server (running on the MicroZed) and the client DLL (running on the PC). Command and control to ADRV902X as well as the FPGA peripherals are performed over the TCP/IP connection.

    We donot provide the reference design for the Ultrascale FPGA.

    Since, you want to add your own IP in the FPGA, it would be good, if you use ZCU102 FPGA  and ADRV9026 and use the Linux drivers for building it. Please follow the below link for the guidelines 

    ADRV9026 & ADRV9029 Prototyping Platform User Guide [Analog Devices Wiki] 

    The HDL reference design is provided in the below link:

    ADRV9026 HDL reference design — HDL documentation