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For the EVAL-ADRV9026/ADRV9029, why does the ADP1762ACPZ-1.0-R7 output 0V?

Category: Hardware
Product Number: ADRV9026 ADRV9029

Hi, ADI team:

    When i got the EVAL-ADRV9026/ADRV9029 board , powered up and then enabled the adp5056(VDDA1P3_AN outputed 1.3v; VDDA1P0 outputed 1.0v; VDDA1P8 outputed 1.8v; 3P3_CLOCK outputed 3.3v ). i found ,the ADP1762ACPZ-1.0-R7 outputed 0V.  Is it right?

    From the Schematics, it looks like that, after enable adp5056, the ADP1762ACPZ-1.0-R7 should output 1V.  But for my board ,the  ADP1762ACPZ-1.0-R7, always outputed 0V.

So my question is: After power up and enable the adp5056, does the  ADP1762ACPZ-1.0-R7 output 1V or 0V?

Thanks a lot!

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  • So my question is: After power up and enable the adp5056, does the  ADP1762ACPZ-1.0-R7 output 1V or 0V?

    The voltage out from this chip must be 1V and this supply is being used for JESD related Pins.

    When i got the EVAL-ADRV9026/ADRV9029 board , powered up and then enabled the adp5056(VDDA1P3_AN outputed 1.3v; VDDA1P0 outputed 1.0v; VDDA1P8 outputed 1.8v; 3P3_CLOCK outputed 3.3v ). i found ,the ADP1762ACPZ-1.0-R7 outputed 0V.  Is it right?

    When you say enabled, are you trying to enable manually/ power up the regulators? Is it not a complate EVB setup- ADS9 + ADRV CE Board?

    If you have another Power board daughter card, can you check with that and let me know?

  • Thank you very much for your reply.

    When you say enabled, are you trying to enable manually/ power up the regulators? Is it not a complate EVB setup- ADS9 + ADRV CE Board?

    ----.No, It is not ADS9+ADRV CE Board. I use a gpio to power up the regulators. My hardware platform is ZC706 (www.xilinx.com/.../ek-z7-zc706-g.html) EVAL-ADRV9026/ADRV9029. Enable adp5056 means that, a gpio (3.3v level) from ZC706 connects the net EN_ALL of ADP5056_PWR_BOARD. After the EN_ALL net gets a High Level, the VDDA1P3_AN outputs 1.3v; VDDA1P0 outputs 1.0v; VDDA1P8 outputs 1.8v; 3P3_CLOCK outputs 3.3v. but the adp1762 outputs 0v. 

    So now , i have another question:

    if the adp1762 is broken, may i put the R119 on and remove R117 (that means that use vdd_1p0 to power  JESD related Pins )?

    Thanks a lot.

Reply
  • Thank you very much for your reply.

    When you say enabled, are you trying to enable manually/ power up the regulators? Is it not a complate EVB setup- ADS9 + ADRV CE Board?

    ----.No, It is not ADS9+ADRV CE Board. I use a gpio to power up the regulators. My hardware platform is ZC706 (www.xilinx.com/.../ek-z7-zc706-g.html) EVAL-ADRV9026/ADRV9029. Enable adp5056 means that, a gpio (3.3v level) from ZC706 connects the net EN_ALL of ADP5056_PWR_BOARD. After the EN_ALL net gets a High Level, the VDDA1P3_AN outputs 1.3v; VDDA1P0 outputs 1.0v; VDDA1P8 outputs 1.8v; 3P3_CLOCK outputs 3.3v. but the adp1762 outputs 0v. 

    So now , i have another question:

    if the adp1762 is broken, may i put the R119 on and remove R117 (that means that use vdd_1p0 to power  JESD related Pins )?

    Thanks a lot.

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