We have a running system using the ADRV9026-MB/PCBZ using an 122.88MHz reference clock on the J613. However, we'd like to use a 10MHz reference input instead. We are using the 90_nonLinkSharing profile. We tried modifying the ad9528InitInst as follows:
ad9528InitInst.pllLockTimeout_ms = 1000;
ad9528InitInst.sysrefSettings.sysrefDivide = 256;
However, the result is that the LO frequency is oscillating around 1kHz around the center frequency (with a period of around 1Hz), so it looks like the PLL1 / onboard VCXO of 122.88MHz is not locking properly.
Did you have any success in using a 10MHz reference clock instead of the 122.88MHz?