I am bringing-up jesd204c on adrv9025 where I am using eval board.
I am seeing that random sync header alignment issue where I am not seeing bit transition. Even though, jesd204_rx_sh_lock and jesd204_rx_emb_lock signals are asserted.
Also, sometime jesd204_rx_sh_lock and jesd204_rx_emb_lock are deasserted.
Could you please give me some pointers where we can look into ?