Design Support ADRV9010

Q&A

Not Answered

Is a LNA(Low Noiose Amplifier) contained in the ADRV9009 inner chip? 0

298 views

2 replies
on Nov 18 2022
by Ramarao
Not Answered

Is the CS and CF parameter of the JESD204B of the ADRV9009 changed to Non-zero value? 0

167 views

0 replies
on Aug 17 2022
by HHoward
Suggested Answer

What are the main difference between ADRV9010 and ADRV9026. +1

626 views

3 replies
on Apr 20 2022
by Ramarao
Not Answered

ADRV9010: Override FPGA side DFE LPM in PHY 0

641 views

1 reply
on Jun 30 2021
by Ramarao
Not Answered

ADRV9010: RF LO Phase Sync API 0

460 views

1 reply
on Jun 30 2021
by Ramarao
Not Answered

ADRV9010 De-framer Link Set Up Procedure 0

557 views

1 reply
on Apr 14 2021
by PVALAVAN
Not Answered

ADRV9010 Framer Link Set Up Procedure 0

438 views

1 reply
on Apr 14 2021
by PVALAVAN
Answered

Resolution of ADC and DAC used in Tx/Rx and Orx path? What is the dynamic range of Rx chain? +1

825 views

1 reply
on Dec 10 2020
by Vinod
Suggested Answer

Does the ADRV9010 chip support both TDD and FDD operation.? How many RF LO’s are there? 0

442 views

1 reply
on Dec 10 2020
by Vinod
Suggested Answer

Will there be a filter wizard available for ADRV9010 0

401 views

1 reply
on Dec 10 2020
by Vinod
Suggested Answer

Will ADRV9010 support GSM, Will ADRV9010 support external LO 0

433 views

1 reply
on Dec 10 2020
by Vinod
Answered

What is the typical power consumption of ADRV9010. +1

894 views

1 reply
on Dec 10 2020
by Vinod
Answered

Where can I find the datasheet and user guide for ADRV9010 +1

1036 views

1 reply
on Dec 10 2020
by Vinod
Answered

Where can I find the schematic, layout files, JCOM files and S-parameter files for ADRV9010. +1

554 views

1 reply
on Dec 10 2020
by Vinod
Answered

What is the max and min JESD rate supported on ADRV9010. +1

633 views

1 reply
on Dec 10 2020
by Vinod